Updated Clocking (markdown)

mossmann
2012-04-17 15:00:21 -07:00
parent 5b1521d479
commit ad64c66fc5

@@ -1,10 +1,10 @@
HackRF clock signals are generated by the Si5351. The plan so far:
crystal frequency: 25 MHz (supports 25 or 27 MHz)
recommended clock input frequency: 10 MHz (supports 10 to 40 MHz, or higher with division)
VCO frequency: 800 MHz (supports 600 to 900 MHz)
MAX2837 clock: 40 MHz
preferred MAX5864 clocks: 8, 10, 12.5, 16, 20 MHz
LPC4330 clock: 20 MHz (from integer-only output)
* crystal frequency: 25 MHz (supports 25 or 27 MHz)
* recommended clock input frequency: 10 MHz (supports 10 to 40 MHz, or higher with division)
* VCO frequency: 800 MHz (supports 600 to 900 MHz)
* MAX2837 clock: 40 MHz
* preferred MAX5864 clocks: 8, 10, 12.5, 16, 20 MHz
* LPC4330 clock: 20 MHz (from integer-only output)
A DDR clock at double the MAX5864 will be delivered to the CPLD.