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Add safe defaults for the FPGA configuration pins in pin_setup()

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This commit is contained in:
mndza
2025-12-04 11:17:41 +01:00
parent 90e15ec85f
commit e4c0dd3cee
2 changed files with 9 additions and 1 deletions
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2
firmware/common/fpga.c
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@@ -96,8 +96,8 @@ bool fpga_image_load(unsigned int index)
// A callback function is used by the FPGA programmer
// to obtain consecutive gateware chunks.
ssp1_set_mode_ice40();
ice40_spi_target_init(&ice40);
ssp1_set_mode_ice40();
struct fpga_image_read_ctx fpga_image_ctx = {
.addr = (uint32_t) &_binary_fpga_bin_start + bitstream_offset,
};

8
firmware/common/hackrf_core.c
View File

@@ -1146,6 +1146,9 @@ void pin_setup(void)
scu_pinmux(SCU_TRIGGER_IN, SCU_TRIGGER_IN_PINCFG);
scu_pinmux(SCU_TRIGGER_OUT, SCU_TRIGGER_OUT_PINCFG);
scu_pinmux(SCU_PPS_OUT, SCU_PPS_OUT_PINCFG);
scu_pinmux(SCU_PINMUX_FPGA_CRESET, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
scu_pinmux(SCU_PINMUX_FPGA_CDONE, SCU_GPIO_PUP | SCU_CONF_FUNCTION4);
scu_pinmux(SCU_PINMUX_FPGA_SPI_CS, SCU_GPIO_NOPULL | SCU_CONF_FUNCTION0);
p2_ctrl_set(P2_SIGNAL_CLK3);
p1_ctrl_set(P1_SIGNAL_CLKIN);
@@ -1162,6 +1165,11 @@ void pin_setup(void)
gpio_output(&gpio_aa_en);
gpio_input(&gpio_trigger_in);
gpio_input(&gpio_trigger_out);
gpio_clear(&gpio_fpga_cfg_spi_cs);
gpio_output(&gpio_fpga_cfg_spi_cs);
gpio_clear(&gpio_fpga_cfg_creset);
gpio_output(&gpio_fpga_cfg_creset);
gpio_input(&gpio_fpga_cfg_cdone);
#endif
/* enable input on SCL and SDA pins */