Zero only the bits we want to be zero

Previously we zeroed all RFFC5072 frequency synthesizer control
registers, resulting in an invalid configuration which could adversely
affect start-up if the part is enabled before a valid frequency is set.
This commit is contained in:
Michael Ossmann
2026-01-25 15:14:26 -05:00
committed by Mike Walters
parent 9aa37b9f8c
commit e95b3afbc3

View File

@@ -107,12 +107,7 @@ void rffc5071_setup(rffc5071_driver_t* const drv)
rffc5071_init(drv);
/* initial setup */
/* put zeros in freq contol registers */
set_RFFC5071_P2N(drv, 0);
set_RFFC5071_P2LODIV(drv, 0);
set_RFFC5071_P2PRESC(drv, 0);
set_RFFC5071_P2VCOSEL(drv, 0);
/* zero low bits of fractional divider */
set_RFFC5071_P2NLSB(drv, 0);
/* set ENBL and MODE to be configured via 3-wire interface,