mirror of
https://github.com/greatscottgadgets/hackrf.git
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firmware: define platform scu
This commit is contained in:
Antoine van Gelder
372
firmware/common/platform_scu.c
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372
firmware/common/platform_scu.c
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/*
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* Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
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*
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* This file is part of HackRF.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; see the file COPYING. If not, write to
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* the Free Software Foundation, Inc., 51 Franklin Street,
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* Boston, MA 02110-1301, USA.
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*/
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#include <stddef.h>
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#include "platform_scu.h"
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// clang-format off
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const platform_scu_t* platform_scu(void)
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{
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static const platform_scu_t* _platform_scu = NULL;
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if (_platform_scu != NULL) {
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return _platform_scu;
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}
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static platform_scu_t scu;
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/* LED PinMux */
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scu.PINMUX_LED1 = SCU_PINMUX_LED1; /* GPIO2[1] on P4_1 */
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scu.PINMUX_LED2 = SCU_PINMUX_LED2; /* GPIO2[2] on P4_2 */
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scu.PINMUX_LED3 = SCU_PINMUX_LED3; /* GPIO2[8] on P6_12 */
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#if defined(PRALINE)
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scu.PINMUX_LED4 = (P8_6); /* GPIO4[6] on P8_6 */
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#elif defined(RAD1O)
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scu.PINMUX_LED4 = (PB_6); /* GPIO5[26] on PB_6 */
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#endif
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/* Power Supply PinMux */
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scu.PINMUX_EN1V8 = (P6_10); /* GPIO3[6] on P6_10 */
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scu.PINMUX_EN1V2 = (P8_7); /* GPIO4[7] on P8_7 */
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#if defined(PRALINE)
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scu.PINMUX_EN3V3_AUX_N = (P6_7); /* GPIO5[15] on P6_7 */
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scu.PINMUX_EN3V3_OC_N = (P6_11); /* GPIO3[7] on P6_11 */
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#endif
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/* GPIO Input PinMux */
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scu.PINMUX_BOOT0 = (P1_1); /* GPIO0[8] on P1_1 */
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scu.PINMUX_BOOT1 = (P1_2); /* GPIO0[9] on P1_2 */
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#if !defined(HACKRF_ONE)
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scu.PINMUX_BOOT2 = (P2_8); /* GPIO5[7] on P2_8 */
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scu.PINMUX_BOOT3 = (P2_9); /* GPIO1[10] on P2_9 */
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#endif
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scu.PINMUX_PP_LCD_TE = (P2_3); /* GPIO5[3] on P2_3 */
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scu.PINMUX_PP_LCD_RDX = (P2_4); /* GPIO5[4] on P2_4 */
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scu.PINMUX_PP_UNUSED = (P2_8); /* GPIO5[7] on P2_8 */
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scu.PINMUX_PP_LCD_WRX = (P2_9); /* GPIO1[10] on P2_9 */
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scu.PINMUX_PP_DIR = (P2_13); /* GPIO1[13] on P2_13 */
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/* USB peripheral */
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#if defined(JAWBREAKER)
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scu.PINMUX_USB_LED0 = (P6_8);
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scu.PINMUX_USB_LED1 = (P6_7);
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#endif
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/* SSP1 Peripheral PinMux */
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scu.SSP1_CIPO = (P1_3); /* P1_3 */
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scu.SSP1_COPI = (P1_4); /* P1_4 */
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scu.SSP1_SCK = (P1_19); /* P1_19 */
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scu.SSP1_CS = (P1_20); /* P1_20 */
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/* CPLD JTAG interface */
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#if defined(PRALINE)
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scu.PINMUX_FPGA_CRESET = (P5_2); /* GPIO2[11] on P5_2 */
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scu.PINMUX_FPGA_CDONE = (P4_10); /* GPIO5[14] */
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scu.PINMUX_FPGA_SPI_CS = (P5_1); /* GPIO2[10] */
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#endif
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scu.PINMUX_CPLD_TDO = (P9_5); /* GPIO5[18] */
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scu.PINMUX_CPLD_TCK = (P6_1); /* GPIO3[ 0] */
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#if defined(RAD1O) || defined(HACKRF_ONE) || defined(PRALINE)
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scu.PINMUX_CPLD_TMS = (P6_5); /* GPIO3[ 4] */
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scu.PINMUX_CPLD_TDI = (P6_2); /* GPIO3[ 1] */
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#else
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scu.PINMUX_CPLD_TMS = (P6_2); /* GPIO3[ 1] */
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scu.PINMUX_CPLD_TDI = (P6_5); /* GPIO3[ 4] */
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#endif
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/* CPLD SGPIO interface */
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#if defined(PRALINE)
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scu.PINMUX_SGPIO0 = (P0_0);
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scu.PINMUX_SGPIO1 = (P0_1);
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scu.PINMUX_SGPIO2 = (P1_15);
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scu.PINMUX_SGPIO3 = (P1_16);
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scu.PINMUX_SGPIO4 = (P9_4);
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scu.PINMUX_SGPIO5 = (P6_6);
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scu.PINMUX_SGPIO6 = (P2_2);
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scu.PINMUX_SGPIO7 = (P1_0);
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scu.PINMUX_SGPIO8 = (P8_0);
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scu.PINMUX_SGPIO9 = (P9_3);
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scu.PINMUX_SGPIO10 = (P8_2);
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scu.PINMUX_SGPIO11 = (P1_17);
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scu.PINMUX_SGPIO12 = (P1_18);
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scu.PINMUX_SGPIO14 = (P1_18);
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scu.PINMUX_SGPIO15 = (P1_18);
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scu.PINMUX_SGPIO0_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
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scu.PINMUX_SGPIO1_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
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scu.PINMUX_SGPIO2_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO3_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO4_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO5_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO6_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.PINMUX_SGPIO7_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO8_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.PINMUX_SGPIO9_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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#else
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scu.PINMUX_SGPIO0 = (P0_0);
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scu.PINMUX_SGPIO1 = (P0_1);
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scu.PINMUX_SGPIO2 = (P1_15);
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scu.PINMUX_SGPIO3 = (P1_16);
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scu.PINMUX_SGPIO4 = (P6_3);
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scu.PINMUX_SGPIO5 = (P6_6);
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scu.PINMUX_SGPIO6 = (P2_2);
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scu.PINMUX_SGPIO7 = (P1_0);
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scu.PINMUX_SGPIO8 = (P9_6);
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scu.PINMUX_SGPIO9 = (P4_3);
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scu.PINMUX_SGPIO10 = (P1_14);
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scu.PINMUX_SGPIO11 = (P1_17);
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scu.PINMUX_SGPIO12 = (P1_18);
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scu.PINMUX_SGPIO14 = (P4_9);
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scu.PINMUX_SGPIO15 = (P4_10);
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scu.PINMUX_SGPIO0_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
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scu.PINMUX_SGPIO1_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION3);
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scu.PINMUX_SGPIO2_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO3_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO4_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO5_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION2);
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scu.PINMUX_SGPIO6_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.PINMUX_SGPIO7_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO8_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO9_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION7);
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scu.PINMUX_SGPIO10_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO11_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION6);
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scu.PINMUX_SGPIO12_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.PINMUX_SGPIO14_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.PINMUX_SGPIO15_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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#endif
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scu.TRIGGER_EN = (P4_8); /* GPIO5[12] on P4_8 */
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/* MAX283x GPIO (XCVR_CTL) PinMux */
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#if defined(PRALINE)
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scu.XCVR_ENABLE = PE_1; /* GPIO7[1] on PE_1 */
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scu.XCVR_RXENABLE = PE_2; /* GPIO7[2] on PE_2 */
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scu.XCVR_CS = PD_14; /* GPIO6[28] on PD_14 */
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scu.XCVR_RXHP = PD_15; /* GPIO6[29] on PD_15 */
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scu.XCVR_LD = P9_6; /* GPIO4[11] on P9_6 */
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scu.XCVR_ENABLE_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.XCVR_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.XCVR_RXHP_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.XCVR_LD_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0 |
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SCU_CONF_EPD_EN_PULLDOWN | SCU_CONF_EPUN_DIS_PULLUP);
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#elif defined(JELLYBEAN) || defined(JAWBREAKER) || defined(HACKRF_ONE)
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scu.XCVR_ENABLE = P4_6; /* GPIO2[6] on P4_6 */
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scu.XCVR_RXENABLE = P4_5; /* GPIO2[5] on P4_5 */
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scu.XCVR_TXENABLE = P4_4; /* GPIO2[4] on P4_4 */
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scu.XCVR_CS = P1_20; /* GPIO0[15] on P1_20 */
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scu.XCVR_ENABLE_PINCFG = (SCU_GPIO_FAST);
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scu.XCVR_RXENABLE_PINCFG = (SCU_GPIO_FAST);
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scu.XCVR_TXENABLE_PINCFG = (SCU_GPIO_FAST);
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scu.XCVR_CS_PINCFG = (SCU_GPIO_FAST);
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#elif defined(RAD1O)
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scu.XCVR_RXHP = P8_1; /* GPIO[] on P8_1 */
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scu.XCVR_B6 = P8_2; /* GPIO[] on P8_2 */
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scu.XCVR_B7 = P9_3; /* GPIO[] on P9_3 */
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#endif
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/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
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#if defined(PRALINE)
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scu.AD_CS = (PD_16); /* GPIO6[30] on PD_16 */
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scu.AD_CS_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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#else
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scu.AD_CS = (P5_7); /* GPIO2[7] on P5_7 */
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scu.AD_CS_PINCFG = (SCU_GPIO_FAST);
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#endif
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/* RFFC5071 GPIO serial interface PinMux */
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#if defined(PRALINE)
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scu.MIXER_ENX = (P5_4); /* GPIO2[13] on P5_4 */
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scu.MIXER_SCLK = (P9_5); /* GPIO5[18] on P9_5 */
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scu.MIXER_SDATA = (P9_2); /* GPIO4[14] on P9_2 */
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scu.MIXER_RESETX = (P5_5); /* GPIO2[14] on P5_5 */
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scu.MIXER_LD = (PD_11); /* GPIO6[25] on PD_11 */
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scu.MIXER_SCLK_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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scu.MIXER_LD_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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#elif defined(JAWBREAKER) || defined(HACKRF_ONE)
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scu.MIXER_ENX = (P5_4); /* GPIO2[13] on P5_4 */
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scu.MIXER_SCLK = (P2_6); /* GPIO5[6] on P2_6 */
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scu.MIXER_SDATA = (P6_4); /* GPIO3[3] on P6_4 */
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scu.MIXER_RESETX = (P5_5); /* GPIO2[14] on P5_5 */
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scu.MIXER_SCLK_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
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scu.MIXER_SDATA_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
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#elif defined(RAD1O)
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scu.VCO_CE = (P5_4); /* GPIO2[13] on P5_4 */
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scu.VCO_SCLK = (P2_6); /* GPIO5[6] on P2_6 */
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scu.VCO_SDATA = (P6_4); /* GPIO3[3] on P6_4 */
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scu.VCO_LE = (P5_5); /* GPIO2[14] on P5_5 */
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scu.VCO_MUX = (PB_5); /* GPIO5[25] on PB_5 */
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scu.MIXER_EN = (P6_8); /* GPIO5[16] on P6_8 */
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scu.SYNT_RFOUT_EN = (P6_9); /* GPIO3[5] on P6_9 */
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#endif
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/* RF LDO control */
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#if defined(JAWBREAKER)
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scu.RF_LDO_ENABLE = (P5_0); /* GPIO2[9] on P5_0 */
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#endif
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/* RF supply (VAA) control */
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#if defined(PRALINE)
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scu.NO_VAA_ENABLE = P8_1; /* GPIO4[1] on P8_1 */
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#elif defined(HACKRF_ONE)
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scu.NO_VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */
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#elif defined(RAD1O)
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scu.VAA_ENABLE = P5_0; /* GPIO2[9] on P5_0 */
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#endif
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/* SPI flash */
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scu.SSP0_CIPO = (P3_6);
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scu.SSP0_COPI = (P3_7);
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scu.SSP0_SCK = (P3_3);
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scu.SSP0_CS = (P3_8); /* GPIO5[11] on P3_8 */
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scu.FLASH_HOLD = (P3_4); /* GPIO1[14] on P3_4 */
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scu.FLASH_WP = (P3_5); /* GPIO1[15] on P3_5 */
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/* RF switch control */
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#if defined(PRALINE)
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scu.TX_EN = P6_5; /* GPIO3[4] on P6_5 */
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scu.MIX_EN_N = P6_3; /* GPIO3[2] on P6_3 */
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scu.MIX_EN_N_R1_0 = P2_6; /* GPIO5[6] on P2_6 */
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scu.LPF_EN = PA_1; /* GPIO4[8] on PA_1 */
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scu.RF_AMP_EN = PA_2; /* GPIO4[9] on PA_2 */
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scu.ANT_BIAS_EN_N = P2_12; /* GPIO1[12] on P2_12 */
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scu.ANT_BIAS_OC_N = P2_11; /* GPIO1[11] on P2_11 */
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#elif defined(HACKRF_ONE)
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scu.HP = P4_0; /* GPIO2[0] on P4_0 */
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scu.LP = P5_1; /* GPIO2[10] on P5_1 */
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scu.TX_MIX_BP = P5_2; /* GPIO2[11] on P5_2 */
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scu.NO_MIX_BYPASS = P1_7; /* GPIO1[0] on P1_7 */
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scu.RX_MIX_BP = P5_3; /* GPIO2[12] on P5_3 */
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scu.TX_AMP = P5_6; /* GPIO2[15] on P5_6 */
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scu.TX = P6_7; /* GPIO5[15] on P6_7 */
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scu.MIX_BYPASS = P6_8; /* GPIO5[16] on P6_8 */
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scu.RX = P2_5; /* GPIO5[5] on P2_5 */
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scu.NO_TX_AMP_PWR = P6_9; /* GPIO3[5] on P6_9 */
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scu.AMP_BYPASS = P2_10; /* GPIO0[14] on P2_10 */
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scu.RX_AMP = P2_11; /* GPIO1[11] on P2_11 */
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scu.NO_RX_AMP_PWR = P2_12; /* GPIO1[12] on P2_12 */
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#elif defined(RAD1O)
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scu.BY_AMP = P1_7; /* GPIO1[0] on P1_7 */
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scu.BY_AMP_N = P2_5; /* GPIO5[5] on P2_5 */
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scu.TX_RX = P2_10; /* GPIO0[14] on P2_10 */
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scu.TX_RX_N = P2_11; /* GPIO1[11] on P2_11 */
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scu.BY_MIX = P2_12; /* GPIO1[12] on P2_12 */
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scu.BY_MIX_N = P5_1; /* GPIO2[10] on P5_1 */
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scu.LOW_HIGH_FILT = P5_2; /* GPIO2[11] on P5_2 */
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scu.LOW_HIGH_FILT_N = P5_3; /* GPIO2[12] on P5_3 */
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scu.TX_AMP = P5_6; /* GPIO2[15] on P5_6 */
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scu.RX_LNA = P6_7; /* GPIO5[15] on P6_7 */
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#endif
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/* Praline */
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#if defined(PRALINE)
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scu.P2_CTRL0 = (PE_3); /* GPIO7[3] on PE_3 */
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scu.P2_CTRL1 = (PE_4); /* GPIO7[4] on PE_4 */
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scu.P1_CTRL0 = (P2_10); /* GPIO0[14] on P2_10 */
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scu.P1_CTRL1 = (P6_8); /* GPIO5[16] on P6_8 */
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scu.P1_CTRL2 = (P6_9); /* GPIO3[5] on P6_9 */
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scu.CLKIN_CTRL = (P1_20); /* GPIO0[15] on P1_20 */
|
||||
scu.AA_EN = (P1_14); /* GPIO1[7] on P1_14 */
|
||||
scu.TRIGGER_IN = (PD_12); /* GPIO6[26] on PD_12 */
|
||||
scu.TRIGGER_OUT = (P2_6); /* GPIO5[6] on P2_6 */
|
||||
scu.PPS_OUT = (P2_5); /* GPIO5[5] on P2_5 */
|
||||
|
||||
scu.P2_CTRL0_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
scu.P2_CTRL1_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
scu.P1_CTRL0_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
|
||||
scu.P1_CTRL1_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
scu.P1_CTRL2_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
|
||||
scu.CLKIN_CTRL_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
|
||||
scu.AA_EN_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION0);
|
||||
scu.TRIGGER_IN_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
scu.TRIGGER_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
scu.PPS_OUT_PINCFG = (SCU_GPIO_FAST | SCU_CONF_FUNCTION4);
|
||||
#endif
|
||||
|
||||
/* HackRF One r9 */
|
||||
#if defined(HACKRF_ONE)
|
||||
scu.H1R9_CLKIN_EN = P6_7; /* GPIO5[15] on P6_7 */
|
||||
scu.H1R9_CLKOUT_EN = P1_2; /* GPIO0[9] on P1_2 = has boot pull-down; */
|
||||
scu.H1R9_MCU_CLK_EN = P1_1; /* GPIO0[8] on P1_1 = has boot pull-up; */
|
||||
scu.H1R9_RX = P2_7; /* GPIO0[7] on P4_4 = has boot pull-up; */
|
||||
scu.H1R9_NO_ANT_PWR = P4_4; /* GPIO2[4] on P4_4 */
|
||||
scu.H1R9_EN1V8 = P5_0; /* GPIO2[9] on P5_0 */
|
||||
scu.H1R9_NO_VAA_EN = P6_10; /* GPIO3[6] on P6_10 */
|
||||
scu.H1R9_TRIGGER_EN = P2_5; /* GPIO5[5] on P2_5 */
|
||||
#endif
|
||||
|
||||
/* Miscellaneous */
|
||||
scu.PINMUX_PP_D0 = (P7_0); /* GPIO3[8] */
|
||||
scu.PINMUX_PP_D1 = (P7_1); /* GPIO3[9] */
|
||||
scu.PINMUX_PP_D2 = (P7_2); /* GPIO3[10] */
|
||||
scu.PINMUX_PP_D3 = (P7_3); /* GPIO3[11] */
|
||||
scu.PINMUX_PP_D4 = (P7_4); /* GPIO3[12] */
|
||||
scu.PINMUX_PP_D5 = (P7_5); /* GPIO3[13] */
|
||||
scu.PINMUX_PP_D6 = (P7_6); /* GPIO3[14] */
|
||||
scu.PINMUX_PP_D7 = (P7_7); /* GPIO3[15] */
|
||||
|
||||
/* TODO add other Pins */
|
||||
|
||||
scu.PINMUX_GPIO3_8 = (P7_0); /* GPIO3[8] */
|
||||
scu.PINMUX_GPIO3_9 = (P7_1); /* GPIO3[9] */
|
||||
scu.PINMUX_GPIO3_10 = (P7_2); /* GPIO3[10] */
|
||||
scu.PINMUX_GPIO3_11 = (P7_3); /* GPIO3[11] */
|
||||
scu.PINMUX_GPIO3_12 = (P7_4); /* GPIO3[12] */
|
||||
scu.PINMUX_GPIO3_13 = (P7_5); /* GPIO3[13] */
|
||||
scu.PINMUX_GPIO3_14 = (P7_6); /* GPIO3[14] */
|
||||
scu.PINMUX_GPIO3_15 = (P7_7); /* GPIO3[15] */
|
||||
|
||||
scu.PINMUX_PP_TDO = (P1_5); /* GPIO1[8] */
|
||||
scu.PINMUX_SD_POW = (P1_5); /* GPIO1[8] */
|
||||
scu.PINMUX_SD_CMD = (P1_6); /* GPIO1[9] */
|
||||
scu.PINMUX_PP_TMS = (P1_8); /* GPIO1[1] */
|
||||
scu.PINMUX_SD_VOLT0 = (P1_8); /* GPIO1[1] */
|
||||
scu.PINMUX_SD_DAT0 = (P1_9); /* GPIO1[2] */
|
||||
scu.PINMUX_SD_DAT1 = (P1_10); /* GPIO1[3] */
|
||||
scu.PINMUX_SD_DAT2 = (P1_11); /* GPIO1[4] */
|
||||
scu.PINMUX_SD_DAT3 = (P1_12); /* GPIO1[5] */
|
||||
scu.PINMUX_SD_CD = (P1_13); /* GPIO1[6] */
|
||||
|
||||
scu.PINMUX_PP_IO_STBX = (P2_0); /* GPIO5[0] */
|
||||
scu.PINMUX_PP_ADDR = (P2_1); /* GPIO5[1] */
|
||||
scu.PINMUX_U0_TXD = (P2_0); /* GPIO5[0] */
|
||||
scu.PINMUX_U0_RXD = (P2_1); /* GPIO5[1] */
|
||||
|
||||
scu.PINMUX_ISP = (P2_7); /* GPIO0[7] */
|
||||
|
||||
scu.PINMUX_GP_CLKIN = (P4_7);
|
||||
|
||||
_platform_scu = &scu;
|
||||
|
||||
return _platform_scu;
|
||||
}
|
||||
|
||||
// clang-format on
|
||||
309
firmware/common/platform_scu.h
Normal file
309
firmware/common/platform_scu.h
Normal file
@@ -0,0 +1,309 @@
|
||||
/*
|
||||
* Copyright 2012-2026 Great Scott Gadgets <info@greatscottgadgets.com>
|
||||
*
|
||||
* This file is part of HackRF.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2, or (at your option)
|
||||
* any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; see the file COPYING. If not, write to
|
||||
* the Free Software Foundation, Inc., 51 Franklin Street,
|
||||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
|
||||
#ifndef __PLATFORM_SCU_H
|
||||
#define __PLATFORM_SCU_H
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#include <libopencm3/lpc43xx/scu.h>
|
||||
#include "platform_detect.h"
|
||||
|
||||
/*
|
||||
* SCU PinMux
|
||||
*/
|
||||
|
||||
typedef struct {
|
||||
/* LED PinMux */
|
||||
scu_grp_pin_t PINMUX_LED1;
|
||||
scu_grp_pin_t PINMUX_LED2;
|
||||
scu_grp_pin_t PINMUX_LED3;
|
||||
#if defined(RAD1O) || defined(PRALINE)
|
||||
scu_grp_pin_t PINMUX_LED4;
|
||||
#endif
|
||||
|
||||
/* Power Supply PinMux */
|
||||
scu_grp_pin_t PINMUX_EN1V8;
|
||||
scu_grp_pin_t PINMUX_EN1V2;
|
||||
#if defined(PRALINE)
|
||||
scu_grp_pin_t PINMUX_EN3V3_AUX_N;
|
||||
scu_grp_pin_t PINMUX_EN3V3_OC_N;
|
||||
#endif
|
||||
|
||||
/* GPIO Input PinMux */
|
||||
scu_grp_pin_t PINMUX_BOOT0;
|
||||
scu_grp_pin_t PINMUX_BOOT1;
|
||||
#if !defined(HACKRF_ONE)
|
||||
scu_grp_pin_t PINMUX_BOOT2;
|
||||
scu_grp_pin_t PINMUX_BOOT3;
|
||||
#endif
|
||||
scu_grp_pin_t PINMUX_PP_LCD_TE;
|
||||
scu_grp_pin_t PINMUX_PP_LCD_RDX;
|
||||
scu_grp_pin_t PINMUX_PP_UNUSED;
|
||||
scu_grp_pin_t PINMUX_PP_LCD_WRX;
|
||||
scu_grp_pin_t PINMUX_PP_DIR;
|
||||
|
||||
/* USB peripheral */
|
||||
#if defined(JAWBREAKER)
|
||||
scu_grp_pin_t PINMUX_USB_LED0;
|
||||
scu_grp_pin_t PINMUX_USB_LED1;
|
||||
#endif
|
||||
|
||||
/* SSP1 Peripheral PinMux */
|
||||
scu_grp_pin_t SSP1_CIPO;
|
||||
scu_grp_pin_t SSP1_COPI;
|
||||
scu_grp_pin_t SSP1_SCK;
|
||||
scu_grp_pin_t SSP1_CS;
|
||||
|
||||
/* CPLD JTAG interface */
|
||||
#if defined(PRALINE)
|
||||
scu_grp_pin_t PINMUX_FPGA_CRESET;
|
||||
scu_grp_pin_t PINMUX_FPGA_CDONE;
|
||||
scu_grp_pin_t PINMUX_FPGA_SPI_CS;
|
||||
#endif
|
||||
scu_grp_pin_t PINMUX_CPLD_TDO;
|
||||
scu_grp_pin_t PINMUX_CPLD_TCK;
|
||||
scu_grp_pin_t PINMUX_CPLD_TMS;
|
||||
scu_grp_pin_t PINMUX_CPLD_TDI;
|
||||
|
||||
/* CPLD SGPIO interface */
|
||||
scu_grp_pin_t PINMUX_SGPIO0;
|
||||
scu_grp_pin_t PINMUX_SGPIO1;
|
||||
scu_grp_pin_t PINMUX_SGPIO2;
|
||||
scu_grp_pin_t PINMUX_SGPIO3;
|
||||
scu_grp_pin_t PINMUX_SGPIO4;
|
||||
scu_grp_pin_t PINMUX_SGPIO5;
|
||||
scu_grp_pin_t PINMUX_SGPIO6;
|
||||
scu_grp_pin_t PINMUX_SGPIO7;
|
||||
scu_grp_pin_t PINMUX_SGPIO8;
|
||||
scu_grp_pin_t PINMUX_SGPIO9;
|
||||
scu_grp_pin_t PINMUX_SGPIO10;
|
||||
scu_grp_pin_t PINMUX_SGPIO11;
|
||||
scu_grp_pin_t PINMUX_SGPIO12;
|
||||
scu_grp_pin_t PINMUX_SGPIO14;
|
||||
scu_grp_pin_t PINMUX_SGPIO15;
|
||||
scu_grp_pin_t PINMUX_SGPIO0_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO1_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO2_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO3_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO4_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO5_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO6_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO7_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO8_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO9_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO10_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO11_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO12_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO14_PINCFG;
|
||||
scu_grp_pin_t PINMUX_SGPIO15_PINCFG;
|
||||
scu_grp_pin_t TRIGGER_EN;
|
||||
|
||||
/* MAX283x GPIO (XCVR_CTL) PinMux */
|
||||
scu_grp_pin_t XCVR_RXHP; // RAD1O, PRALINE
|
||||
scu_grp_pin_t XCVR_B6; // RAD1O
|
||||
scu_grp_pin_t XCVR_B7; // RAD1O
|
||||
scu_grp_pin_t XCVR_ENABLE; // PRALINE, HACKRF_ONE
|
||||
scu_grp_pin_t XCVR_RXENABLE; // PRALINE, HACKRF_ONE
|
||||
scu_grp_pin_t XCVR_CS; // PRALINE, HACKRF_ONE
|
||||
scu_grp_pin_t XCVR_LD; // PRALINE
|
||||
uint32_t XCVR_ENABLE_PINCFG; // PRALINE, HACKRF_ONE
|
||||
uint32_t XCVR_RXENABLE_PINCFG; // PRALINE, HACKRF_ONE
|
||||
uint32_t XCVR_CS_PINCFG; // PRALINE, HACKRF_ONE
|
||||
uint32_t XCVR_RXHP_PINCFG; // PRALINE
|
||||
uint32_t XCVR_LD_PINCFG; // PRALINE
|
||||
scu_grp_pin_t XCVR_TXENABLE; // HACKRF_ONE
|
||||
uint32_t XCVR_TXENABLE_PINCFG; // HACKRF_ONE
|
||||
|
||||
/* MAX5864 SPI chip select (AD_CS) GPIO PinMux */
|
||||
scu_grp_pin_t AD_CS;
|
||||
scu_grp_pin_t AD_CS_PINCFG;
|
||||
|
||||
/* RFFC5071 GPIO serial interface PinMux */
|
||||
scu_grp_pin_t MIXER_ENX;
|
||||
scu_grp_pin_t MIXER_SCLK;
|
||||
scu_grp_pin_t MIXER_SDATA;
|
||||
scu_grp_pin_t MIXER_RESETX;
|
||||
uint32_t MIXER_SCLK_PINCFG;
|
||||
uint32_t MIXER_SDATA_PINCFG;
|
||||
#if defined(PRALINE)
|
||||
scu_grp_pin_t MIXER_LD;
|
||||
uint32_t MIXER_LD_PINCFG;
|
||||
#elif defined(RAD1O)
|
||||
scu_grp_pin_t VCO_CE;
|
||||
scu_grp_pin_t VCO_SCLK;
|
||||
scu_grp_pin_t VCO_SDATA;
|
||||
scu_grp_pin_t VCO_LE;
|
||||
scu_grp_pin_t VCO_MUX;
|
||||
scu_grp_pin_t MIXER_EN;
|
||||
scu_grp_pin_t SYNT_RFOUT_EN;
|
||||
#endif
|
||||
|
||||
/* RF LDO control */
|
||||
#if defined(JAWBREAKER)
|
||||
scu_grp_pin_t RF_LDO_ENABLE;
|
||||
#endif
|
||||
|
||||
/* RF supply (VAA) control */
|
||||
#if defined(PRALINE) || defined(HACKRF_ONE)
|
||||
scu_grp_pin_t NO_VAA_ENABLE;
|
||||
#elif defined(RAD1O)
|
||||
scu_grp_pin_t VAA_ENABLE;
|
||||
#endif
|
||||
|
||||
/* SPI flash */
|
||||
scu_grp_pin_t SSP0_CIPO;
|
||||
scu_grp_pin_t SSP0_COPI;
|
||||
scu_grp_pin_t SSP0_SCK;
|
||||
scu_grp_pin_t SSP0_CS;
|
||||
scu_grp_pin_t FLASH_HOLD;
|
||||
scu_grp_pin_t FLASH_WP;
|
||||
|
||||
/* RF switch control */
|
||||
#if defined(PRALINE)
|
||||
scu_grp_pin_t TX_EN;
|
||||
scu_grp_pin_t MIX_EN_N;
|
||||
scu_grp_pin_t MIX_EN_N_R1_0;
|
||||
scu_grp_pin_t LPF_EN;
|
||||
scu_grp_pin_t RF_AMP_EN;
|
||||
scu_grp_pin_t ANT_BIAS_EN_N;
|
||||
scu_grp_pin_t ANT_BIAS_OC_N;
|
||||
#elif defined(HACKRF_ONE)
|
||||
scu_grp_pin_t HP;
|
||||
scu_grp_pin_t LP;
|
||||
scu_grp_pin_t TX_MIX_BP;
|
||||
scu_grp_pin_t NO_MIX_BYPASS;
|
||||
scu_grp_pin_t RX_MIX_BP;
|
||||
scu_grp_pin_t TX_AMP;
|
||||
scu_grp_pin_t TX;
|
||||
scu_grp_pin_t MIX_BYPASS;
|
||||
scu_grp_pin_t RX;
|
||||
scu_grp_pin_t NO_TX_AMP_PWR;
|
||||
scu_grp_pin_t AMP_BYPASS;
|
||||
scu_grp_pin_t RX_AMP;
|
||||
scu_grp_pin_t NO_RX_AMP_PWR;
|
||||
#elif defined(RAD1O)
|
||||
scu_grp_pin_t BY_AMP;
|
||||
scu_grp_pin_t BY_AMP_N;
|
||||
scu_grp_pin_t TX_RX;
|
||||
scu_grp_pin_t TX_RX_N;
|
||||
scu_grp_pin_t BY_MIX;
|
||||
scu_grp_pin_t BY_MIX_N;
|
||||
scu_grp_pin_t LOW_HIGH_FILT;
|
||||
scu_grp_pin_t LOW_HIGH_FILT_N;
|
||||
scu_grp_pin_t TX_AMP;
|
||||
scu_grp_pin_t RX_LNA;
|
||||
#endif
|
||||
|
||||
/* Praline */
|
||||
#if defined(PRALINE)
|
||||
scu_grp_pin_t P2_CTRL0;
|
||||
scu_grp_pin_t P2_CTRL1;
|
||||
scu_grp_pin_t P1_CTRL0;
|
||||
scu_grp_pin_t P1_CTRL1;
|
||||
scu_grp_pin_t P1_CTRL2;
|
||||
scu_grp_pin_t CLKIN_CTRL;
|
||||
scu_grp_pin_t AA_EN;
|
||||
scu_grp_pin_t TRIGGER_IN;
|
||||
scu_grp_pin_t TRIGGER_OUT;
|
||||
scu_grp_pin_t PPS_OUT;
|
||||
|
||||
scu_grp_pin_t P2_CTRL0_PINCFG;
|
||||
scu_grp_pin_t P2_CTRL1_PINCFG;
|
||||
scu_grp_pin_t P1_CTRL0_PINCFG;
|
||||
scu_grp_pin_t P1_CTRL1_PINCFG;
|
||||
scu_grp_pin_t P1_CTRL2_PINCFG;
|
||||
scu_grp_pin_t CLKIN_CTRL_PINCFG;
|
||||
scu_grp_pin_t AA_EN_PINCFG;
|
||||
scu_grp_pin_t TRIGGER_IN_PINCFG;
|
||||
scu_grp_pin_t TRIGGER_OUT_PINCFG;
|
||||
scu_grp_pin_t PPS_OUT_PINCFG;
|
||||
#endif
|
||||
|
||||
/* HackRF One r9 */
|
||||
#if defined(HACKRF_ONE)
|
||||
scu_grp_pin_t H1R9_CLKIN_EN;
|
||||
scu_grp_pin_t H1R9_CLKOUT_EN;
|
||||
scu_grp_pin_t H1R9_MCU_CLK_EN;
|
||||
scu_grp_pin_t H1R9_RX;
|
||||
scu_grp_pin_t H1R9_NO_ANT_PWR;
|
||||
scu_grp_pin_t H1R9_EN1V8;
|
||||
scu_grp_pin_t H1R9_NO_VAA_EN;
|
||||
scu_grp_pin_t H1R9_TRIGGER_EN;
|
||||
#endif
|
||||
|
||||
/* Miscellaneous */
|
||||
scu_grp_pin_t PINMUX_PP_D0;
|
||||
scu_grp_pin_t PINMUX_PP_D1;
|
||||
scu_grp_pin_t PINMUX_PP_D2;
|
||||
scu_grp_pin_t PINMUX_PP_D3;
|
||||
scu_grp_pin_t PINMUX_PP_D4;
|
||||
scu_grp_pin_t PINMUX_PP_D5;
|
||||
scu_grp_pin_t PINMUX_PP_D6;
|
||||
scu_grp_pin_t PINMUX_PP_D7;
|
||||
|
||||
/* TODO add other Pins */
|
||||
|
||||
scu_grp_pin_t PINMUX_GPIO3_8;
|
||||
scu_grp_pin_t PINMUX_GPIO3_9;
|
||||
scu_grp_pin_t PINMUX_GPIO3_10;
|
||||
scu_grp_pin_t PINMUX_GPIO3_11;
|
||||
scu_grp_pin_t PINMUX_GPIO3_12;
|
||||
scu_grp_pin_t PINMUX_GPIO3_13;
|
||||
scu_grp_pin_t PINMUX_GPIO3_14;
|
||||
scu_grp_pin_t PINMUX_GPIO3_15;
|
||||
|
||||
scu_grp_pin_t PINMUX_PP_TDO;
|
||||
scu_grp_pin_t PINMUX_SD_POW;
|
||||
scu_grp_pin_t PINMUX_SD_CMD;
|
||||
scu_grp_pin_t PINMUX_PP_TMS;
|
||||
scu_grp_pin_t PINMUX_SD_VOLT0;
|
||||
scu_grp_pin_t PINMUX_SD_DAT0;
|
||||
scu_grp_pin_t PINMUX_SD_DAT1;
|
||||
scu_grp_pin_t PINMUX_SD_DAT2;
|
||||
scu_grp_pin_t PINMUX_SD_DAT3;
|
||||
scu_grp_pin_t PINMUX_SD_CD;
|
||||
|
||||
scu_grp_pin_t PINMUX_PP_IO_STBX;
|
||||
scu_grp_pin_t PINMUX_PP_ADDR;
|
||||
scu_grp_pin_t PINMUX_U0_TXD;
|
||||
scu_grp_pin_t PINMUX_U0_RXD;
|
||||
|
||||
scu_grp_pin_t PINMUX_ISP;
|
||||
|
||||
scu_grp_pin_t PINMUX_GP_CLKIN;
|
||||
} platform_scu_t;
|
||||
|
||||
// Detects and returns the global platform scu instance of the active board id and revision.
|
||||
const platform_scu_t* platform_scu(void);
|
||||
|
||||
// Platform detection needs these for error indication.
|
||||
#define SCU_PINMUX_LED1 (P4_1) /* GPIO2[1] on P4_1 */
|
||||
#define SCU_PINMUX_LED2 (P4_2) /* GPIO2[2] on P4_2 */
|
||||
#define SCU_PINMUX_LED3 (P6_12) /* GPIO2[8] on P6_12 */
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* __PLATFORM_SCU_H */
|
||||
@@ -186,6 +186,7 @@ macro(DeclareTargets)
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/hackrf_ui.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/platform_detect.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/platform_gpio.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/platform_scu.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/firmware_info.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/clkin.c
|
||||
${PATH_HACKRF_FIRMWARE_COMMON}/gpdma.c
|
||||
|
||||
Reference in New Issue
Block a user