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Rename hw_sync to trigger

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Replace hw_sync_mode_t with bool.
This commit is contained in:
Michael Ossmann
2025-12-30 20:10:10 -05:00
parent 8e14cf6b0c
commit 0ab032c4fc
10 changed files with 29 additions and 43 deletions
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4
firmware/common/fpga.c
View File

@@ -82,10 +82,10 @@ void fpga_regs_commit(fpga_driver_t* const drv)
}
}
void fpga_set_hw_sync_enable(fpga_driver_t* const drv, const hw_sync_mode_t hw_sync_mode)
void fpga_set_trigger_enable(fpga_driver_t* const drv, const bool enable)
{
fpga_reg_read(drv, FPGA_STANDARD_CTRL);
set_FPGA_STANDARD_CTRL_TRIGGER_EN(drv, hw_sync_mode == 1);
set_FPGA_STANDARD_CTRL_TRIGGER_EN(drv, enable & 0b1);
fpga_regs_commit(drv);
}

2
firmware/common/fpga.h
View File

@@ -63,7 +63,7 @@ extern void fpga_reg_write(fpga_driver_t* const drv, uint8_t r, uint8_t v);
* provided routines for those operations. */
extern void fpga_regs_commit(fpga_driver_t* const drv);
void fpga_set_hw_sync_enable(fpga_driver_t* const drv, const hw_sync_mode_t hw_sync_mode);
void fpga_set_trigger_enable(fpga_driver_t* const drv, const bool enable);
void fpga_set_rx_dc_block_enable(fpga_driver_t* const drv, const bool enable);
void fpga_set_rx_decimation_ratio(fpga_driver_t* const drv, const uint8_t value);
void fpga_set_rx_quarter_shift_mode(

16
firmware/common/hackrf_core.c
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@@ -170,7 +170,7 @@ static struct gpio_t gpio_cpld_pp_tdo = GPIO(1, 8);
/* other CPLD interface GPIO pins */
#ifndef PRALINE
static struct gpio_t gpio_hw_sync_enable = GPIO(5, 12);
static struct gpio_t gpio_trigger_enable = GPIO(5, 12);
#endif
static struct gpio_t gpio_q_invert = GPIO(0, 13);
@@ -179,7 +179,7 @@ static struct gpio_t gpio_q_invert = GPIO(0, 13);
static struct gpio_t gpio_h1r9_rx = GPIO(0, 7);
static struct gpio_t gpio_h1r9_1v8_enable = GPIO(2, 9);
static struct gpio_t gpio_h1r9_vaa_disable = GPIO(3, 6);
static struct gpio_t gpio_h1r9_hw_sync_enable = GPIO(5, 5);
static struct gpio_t gpio_h1r9_trigger_enable = GPIO(5, 5);
#endif
#ifdef PRALINE
@@ -324,7 +324,7 @@ w25q80bv_driver_t spi_flash = {
sgpio_config_t sgpio_config = {
.gpio_q_invert = &gpio_q_invert,
#ifndef PRALINE
.gpio_hw_sync_enable = &gpio_hw_sync_enable,
.gpio_trigger_enable = &gpio_trigger_enable,
#endif
.slice_mode_multislice = true,
};
@@ -375,7 +375,7 @@ radio_t radio = {
.mode = TRANSCEIVER_MODE_OFF,
.clock[RADIO_CLOCK_CLKIN] = {.enable = false},
.clock[RADIO_CLOCK_CLKOUT] = {.enable = false},
.trigger_mode = HW_SYNC_MODE_OFF,
.trigger_enable = false,
},
.clock_source = CLOCK_SOURCE_HACKRF,
},
@@ -1198,7 +1198,7 @@ void pin_setup(void)
#ifdef HACKRF_ONE
if (detected_platform() == BOARD_ID_HACKRF1_R9) {
rf_path.gpio_rx = &gpio_h1r9_rx;
sgpio_config.gpio_hw_sync_enable = &gpio_h1r9_hw_sync_enable;
sgpio_config.gpio_trigger_enable = &gpio_h1r9_trigger_enable;
}
#endif
@@ -1360,12 +1360,12 @@ void set_leds(const uint8_t state)
}
}
void hw_sync_enable(const hw_sync_mode_t hw_sync_mode)
void trigger_enable(const bool enable)
{
#ifndef PRALINE
gpio_write(sgpio_config.gpio_hw_sync_enable, hw_sync_mode == 1);
gpio_write(sgpio_config.gpio_trigger_enable, enable);
#else
fpga_set_hw_sync_enable(&fpga, hw_sync_mode);
fpga_set_trigger_enable(&fpga, enable);
#endif
}

6
firmware/common/hackrf_core.h
View File

@@ -179,7 +179,7 @@ extern "C" {
#define SCU_PINMUX_SGPIO15_PINCFG (SCU_GPIO_FAST | SCU_CONF_FUNCTION4)
#endif
#define SCU_HW_SYNC_EN (P4_8) /* GPIO5[12] on P4_8 */
#define SCU_TRIGGER_EN (P4_8) /* GPIO5[12] on P4_8 */
/* MAX2837 GPIO (XCVR_CTL) PinMux */
#ifdef RAD1O
@@ -387,7 +387,7 @@ extern "C" {
#define SCU_H1R9_NO_ANT_PWR (P4_4) /* GPIO2[4] on P4_4 */
#define SCU_H1R9_EN1V8 (P5_0) /* GPIO2[9] on P5_0 */
#define SCU_H1R9_NO_VAA_EN (P6_10) /* GPIO3[6] on P6_10 */
#define SCU_H1R9_HW_SYNC_EN (P2_5) /* GPIO5[5] on P2_5 */
#define SCU_H1R9_TRIGGER_EN (P2_5) /* GPIO5[5] on P2_5 */
void delay(uint32_t duration);
void delay_us_at_mhz(uint32_t us, uint32_t mhz);
@@ -460,7 +460,7 @@ void led_off(const led_t led);
void led_toggle(const led_t led);
void set_leds(const uint8_t state);
void hw_sync_enable(const hw_sync_mode_t hw_sync_mode);
void trigger_enable(const bool enable);
void halt_and_flash(const uint32_t duration);

11
firmware/common/radio.c
View File

@@ -321,20 +321,17 @@ radio_clock_t radio_get_clock(
return radio->channel[chan_id].config.clock[element];
}
radio_error_t radio_set_trigger_mode(
radio_t* radio,
radio_chan_id chan_id,
hw_sync_mode_t mode)
radio_error_t radio_set_trigger_enable(radio_t* radio, radio_chan_id chan_id, bool enable)
{
radio_config_t* config = &radio->channel[chan_id].config;
config->trigger_mode = mode;
config->trigger_enable = enable;
return RADIO_OK;
}
hw_sync_mode_t radio_get_trigger_mode(radio_t* radio, radio_chan_id chan_id)
bool radio_get_trigger_enable(radio_t* radio, radio_chan_id chan_id)
{
return radio->channel[chan_id].config.trigger_mode;
return radio->channel[chan_id].config.trigger_enable;
}
transceiver_mode_t radio_get_mode(radio_t* radio, radio_chan_id chan_id)

15
firmware/common/radio.h
View File

@@ -106,12 +106,6 @@ typedef struct {
bool enable;
} radio_clock_t;
// legacy type, moved from hackrf_core
typedef enum {
HW_SYNC_MODE_OFF = 0,
HW_SYNC_MODE_ON = 1,
} hw_sync_mode_t;
// legacy type, moved from hackrf_core
typedef enum {
CLOCK_SOURCE_HACKRF = 0,
@@ -158,7 +152,7 @@ typedef struct {
radio_clock_t clock[RADIO_CLOCK_COUNT];
// trigger elements
hw_sync_mode_t trigger_mode;
bool trigger_enable;
// currently active transceiver mode
transceiver_mode_t mode;
@@ -245,11 +239,8 @@ radio_clock_t radio_get_clock(
radio_chan_id chan_id,
radio_clock_id element);
radio_error_t radio_set_trigger_mode(
radio_t* radio,
radio_chan_id chan_id,
hw_sync_mode_t mode);
hw_sync_mode_t radio_get_trigger_mode(radio_t* radio, radio_chan_id chan_id);
radio_error_t radio_set_trigger_enable(radio_t* radio, radio_chan_id chan_id, bool enable);
bool radio_get_trigger_enable(radio_t* radio, radio_chan_id chan_id);
transceiver_mode_t radio_get_mode(radio_t* radio, radio_chan_id chan_id);
rf_path_direction_t radio_get_direction(radio_t* radio, radio_chan_id chan_id);

8
firmware/common/sgpio.c
View File

@@ -52,11 +52,11 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
if (detected_platform() == BOARD_ID_HACKRF1_R9) {
scu_pinmux(
SCU_H1R9_HW_SYNC_EN,
SCU_H1R9_TRIGGER_EN,
SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[5] */
} else {
scu_pinmux(
SCU_HW_SYNC_EN,
SCU_TRIGGER_EN,
SCU_GPIO_FAST | SCU_CONF_FUNCTION4); /* GPIO5[12] */
}
@@ -64,8 +64,8 @@ void sgpio_configure_pin_functions(sgpio_config_t* const config)
gpio_output(config->gpio_q_invert);
#ifndef PRALINE
hw_sync_enable(0);
gpio_output(config->gpio_hw_sync_enable);
trigger_enable(false);
gpio_output(config->gpio_trigger_enable);
#endif
}

2
firmware/common/sgpio.h
View File

@@ -38,7 +38,7 @@ typedef enum {
typedef struct sgpio_config_t {
gpio_t gpio_q_invert;
#ifndef PRALINE
gpio_t gpio_hw_sync_enable;
gpio_t gpio_trigger_enable;
#endif
bool slice_mode_multislice;
} sgpio_config_t;

7
firmware/hackrf_usb/usb_api_transceiver.c
View File

@@ -376,8 +376,7 @@ void transceiver_startup(const transceiver_mode_t mode)
}
activate_best_clock_source();
hw_sync_mode_t trigger_mode = radio_get_trigger_mode(&radio, RADIO_CHANNEL0);
hw_sync_enable(trigger_mode);
trigger_enable(radio_get_trigger_enable(&radio, RADIO_CHANNEL0));
}
usb_request_status_t usb_vendor_request_set_transceiver_mode(
@@ -407,10 +406,10 @@ usb_request_status_t usb_vendor_request_set_hw_sync_mode(
const usb_transfer_stage_t stage)
{
if (stage == USB_TRANSFER_STAGE_SETUP) {
radio_error_t result = radio_set_trigger_mode(
radio_error_t result = radio_set_trigger_enable(
&radio,
RADIO_CHANNEL0,
endpoint->setup.value);
endpoint->setup.value != 0);
if (result == RADIO_OK) {
usb_transfer_schedule_ack(endpoint->in);
return USB_REQUEST_STATUS_OK;

1
firmware/hackrf_usb/usb_api_transceiver.h
View File

@@ -35,7 +35,6 @@ typedef struct {
extern volatile transceiver_request_t transceiver_request;
void set_hw_sync_mode(const hw_sync_mode_t new_hw_sync_mode);
usb_request_status_t usb_vendor_request_set_transceiver_mode(
usb_endpoint_t* const endpoint,
const usb_transfer_stage_t stage);