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https://github.com/gbdk-2020/gbdk-2020.git
synced 2026-02-20 00:32:21 +01:00
NES: Reduce zeropage usage by merging flag for oam validity and forced blanking to one byte (#753)
This commit is contained in:
@@ -66,12 +66,11 @@ __current_bank:: .ds 1
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_sys_time:: .ds 2
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_shadow_PPUCTRL:: .ds 1
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_shadow_PPUMASK:: .ds 1
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__crt0_spritePageValid: .ds 1
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_bkg_scroll_x:: .ds 1
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_bkg_scroll_y:: .ds 1
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_attribute_row_dirty:: .ds 1
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_attribute_column_dirty:: .ds 1
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.crt0_forced_blanking:: .ds 1
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__oam_valid_display_on:: .ds 1
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__SYSTEM:: .ds 1
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__hblank_writes_index: .ds 1
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@@ -134,7 +133,7 @@ ProcessDrawList_DoOneTransfer:
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; .bndry 0x100 (skip alignment as previous alignment means page-cross won't happen)
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__crt0_doSpriteDMA:
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bit *__crt0_spritePageValid
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bit *__oam_valid_display_on
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bpl __crt0_doSpriteDMA_spritePageInvalid
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lda #0 ; +2
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sta OAMADDR ; +4
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@@ -542,8 +541,9 @@ _wait_vbl_done_waitForNextFrame:
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sty *__hblank_writes_index
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; Enable OAM DMA in next NMI
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sec
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ror *__crt0_spritePageValid
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lda *__oam_valid_display_on
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ora #OAM_VALID_MASK
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sta *__oam_valid_display_on
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; Restore shadow registers
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pla
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sta *_bkg_scroll_y
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@@ -560,8 +560,9 @@ _wait_vbl_done_waitForNextFrame_loop:
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beq _wait_vbl_done_waitForNextFrame_loop
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; Disable OAM DMA in next NMI
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clc
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ror *__crt0_spritePageValid
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lda *__oam_valid_display_on
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and #~OAM_VALID_MASK
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sta *__oam_valid_display_on
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rts
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@@ -594,8 +595,9 @@ _display_off::
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sta *_shadow_PPUMASK
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sta PPUMASK
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; Set forced blanking bit
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sec
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ror *.crt0_forced_blanking
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lda *__oam_valid_display_on
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ora #DISPLAY_OFF_MASK
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sta *__oam_valid_display_on
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rts
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.display_on::
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@@ -604,8 +606,9 @@ _display_on::
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ora #(PPUMASK_SHOW_BG | PPUMASK_SHOW_SPR)
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sta *_shadow_PPUMASK
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; Clear forced blanking bit
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clc
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ror *.crt0_forced_blanking
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lda *__oam_valid_display_on
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and #~DISPLAY_OFF_MASK
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sta *__oam_valid_display_on
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rts
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__crt0_RESET:
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@@ -669,7 +672,7 @@ __crt0_RESET_bankSwitchValue:
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lda #(PPUMASK_SHOW_BG | PPUMASK_SHOW_SPR | PPUMASK_SHOW_BG_LC | PPUMASK_SHOW_SPR_LC)
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sta *_shadow_PPUMASK
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lda #0x80
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sta *__crt0_spritePageValid
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sta *__oam_valid_display_on
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; enable NMI
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lda #(PPUCTRL_NMI | PPUCTRL_SPR_CHR)
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sta *_shadow_PPUCTRL
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@@ -8,6 +8,10 @@
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;; Number of 8-cycles available each frame for transfer buffer
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VRAM_DELAY_CYCLES_X8 = 171
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; Bits for quick checking of OAM validity and display ON/OFF
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OAM_VALID_MASK = 0x80
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DISPLAY_OFF_MASK = 0x40
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;; Keypad
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.UP = 0x08
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.DOWN = 0x04
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@@ -42,8 +42,8 @@ _set_sprite_data::
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rol
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asl *.ppu_addr_lo
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rol
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bit *.crt0_forced_blanking
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bpl .copy_tiles_indirect
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bit *__oam_valid_display_on
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bvc .copy_tiles_indirect
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; Direct write
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sta PPUADDR
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lda *.ppu_addr_lo
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@@ -43,8 +43,8 @@ _set_sprite_native_data::
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rol
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asl *.ppu_addr_lo
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rol
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bit *.crt0_forced_blanking
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bpl .copy_tiles_indirect
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bit *__oam_valid_display_on
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bvc .copy_tiles_indirect
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; Direct write
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sta PPUADDR
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lda *.ppu_addr_lo
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@@ -69,8 +69,8 @@ __vram_transfer_buffer_pos_old:: .ds 1
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;
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.ppu_stripe_begin_horizontal::
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clc
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bit *.crt0_forced_blanking
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bpl .ppu_stripe_begin_indirect
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bit *__oam_valid_display_on
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bvc .ppu_stripe_begin_indirect
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; Direct write
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stx PPUADDR
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sta PPUADDR
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@@ -86,8 +86,8 @@ __vram_transfer_buffer_pos_old:: .ds 1
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;
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.ppu_stripe_begin_vertical::
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sec
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bit *.crt0_forced_blanking
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bpl .ppu_stripe_begin_indirect
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bit *__oam_valid_display_on
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bvc .ppu_stripe_begin_indirect
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; Direct write
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stx PPUADDR
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sta PPUADDR
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@@ -142,8 +142,8 @@ __vram_transfer_buffer_pos_old:: .ds 1
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; End a stripe (be it direct or via transfer buffer)
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;
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.ppu_stripe_end::
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bit *.crt0_forced_blanking
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bpl 1$
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bit *__oam_valid_display_on
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bvc 1$
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; For direct writes there's nothing more to do
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rts
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1$:
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@@ -175,8 +175,8 @@ __vram_transfer_buffer_pos_old:: .ds 1
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; Writes a byte of an in-progress horizontal / vertical stripe (be it direct or via transfer buffer)
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;
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.ppu_stripe_write_byte::
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bit *.crt0_forced_blanking
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bpl 1$
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bit *__oam_valid_display_on
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bvc 1$
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sta PPUDATA ; Direct write
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rts
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1$:
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@@ -208,8 +208,8 @@ _set_vram_byte::
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.ppu_stripe_append::
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.define ppu_addr ".tmp"
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;
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bit *.crt0_forced_blanking
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bpl .ppu_stripe_append_indirect
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bit *__oam_valid_display_on
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bvc .ppu_stripe_append_indirect
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; Direct write
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stx PPUADDR
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sta PPUADDR
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