diff --git a/Clocking.md b/Clocking.md
index bf8f8be..b23b3ec 100644
--- a/Clocking.md
+++ b/Clocking.md
@@ -10,11 +10,11 @@ HackRF clock signals are generated by the Si5351.  The plan so far:
 
 Future Si5351 output mapping:
 
-CLK0 -> none
-CLK1 -> none
-CLK2 -> RFFC5071
-CLK3 -> MAX2837
-CLK4 -> MAX5864
-CLK5 -> external clock output
-CLK6 -> CPLD
-CLK7 -> CPLD
\ No newline at end of file
+* CLK0 -> none
+* CLK1 -> none
+* CLK2 -> RFFC5071
+* CLK3 -> MAX2837
+* CLK4 -> MAX5864
+* CLK5 -> external clock output
+* CLK6 -> CPLD
+* CLK7 -> CPLD
\ No newline at end of file