Jared Boone d68036f79d Eliminate ill-conceived HOST_CLK from CPLD. ...

Rearrange clocks to not use AC-coupled CLK1 from Si5351C.
Move CODEC_CLK to GCLK1, CODEC_X2_CLK (now HOST_CLK, too) to GCLK2.
Add trace on Jellybean PCB to connect GCLK2 to LPC4330 pin 56 (P1_12) -- a different SGPIO8.

2012-06-14 19:08:20 -07:00

..

jellybean

Eliminate ill-conceived HOST_CLK from CPLD.

2012-06-14 19:08:20 -07:00

kicad

updated SMA module to match CONREVSMA003.062 recommended footprint

2012-06-03 20:13:02 -06:00

lemondrop

fixed balun pin order

2012-05-06 16:09:00 -06:00

lollipop

completed BOM info

2012-06-04 14:44:25 -06:00

test

noting discrepancy between implementations

2012-06-13 21:27:14 -06:00