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For RX, this replaces received samples with an 8-bit incrementing counter. This allows for identification of any dropped or repeated samples across the SGPIO interface. For TX, this compares transmitted samples against another 8-bit incrementing counter, and raises pin B2AUX1 if they don't match. This should be used with a tool on the host-side that transmits a matching counter.
The primary CPLD image is: sgpio_if/default.xsvf This is a binary file built from HDL source in sgpio_if. You do not need Xilinx tools unless you want to make your own modifications. To update the CPLD, first update the firmware, libhackrf, and hackrf-tools. Then: $ hackrf_cpldjtag -x sgpio_if/default.xsvf After a few seconds, three LEDs should start blinking. This indicates that the CPLD has been programmed successfully. Reset the HackRF device by pressing the RESET button or by unplugging it and plugging it back in.