diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c
index de7f1f70..d4964259 100644
--- a/firmware/common/rffc5071.c
+++ b/firmware/common/rffc5071.c
@@ -285,21 +285,17 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo)
 	fvco = lo << n_lo;
 
 	/*
-	 * Higher charge pump leakage setting is required above 3.2 GHz.
+	 * Higher charge pump leakage setting and fbkdivlog are required above
+	 * 3.2 GHz.
 	 */
 	if (fvco > (3200 * FREQ_ONE_MHZ)) {
+		fbkdivlog = 2;
 		set_RFFC5071_PLLCPL(drv, 3);
 	} else {
+		fbkdivlog = 1;
 		set_RFFC5071_PLLCPL(drv, 2);
 	}
 
-	/*
-	 * Supposedly fbkdivlog can be set to 1 when VCO is below 3.2 GHz, but
-	 * this has resulted in tuning instability on some boards, most evident
-	 * in RX sweep mode.
-	 */
-	fbkdivlog = 2;
-
 	uint64_t tmp_n = (fvco << (24ULL - fbkdivlog)) / REF_FREQ;
 
 	/* Round to nearest step = ref_MHz / 2**s. For s=6, step=625000 Hz */