From e95b3afbc3efe4ccfd8d3384f9fc640e00169387 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Sun, 25 Jan 2026 15:14:26 -0500 Subject: [PATCH 1/8] Zero only the bits we want to be zero Previously we zeroed all RFFC5072 frequency synthesizer control registers, resulting in an invalid configuration which could adversely affect start-up if the part is enabled before a valid frequency is set. --- firmware/common/rffc5071.c | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index 05a63506..f122dd1b 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -107,12 +107,7 @@ void rffc5071_setup(rffc5071_driver_t* const drv) rffc5071_init(drv); - /* initial setup */ - /* put zeros in freq contol registers */ - set_RFFC5071_P2N(drv, 0); - set_RFFC5071_P2LODIV(drv, 0); - set_RFFC5071_P2PRESC(drv, 0); - set_RFFC5071_P2VCOSEL(drv, 0); + /* zero low bits of fractional divider */ set_RFFC5071_P2NLSB(drv, 0); /* set ENBL and MODE to be configured via 3-wire interface, From 845c0c8394d7e7e98924e3b27f82de1e518c41b2 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Sun, 25 Jan 2026 15:20:01 -0500 Subject: [PATCH 2/8] Enable RFFC5072 reference oscillator standby --- firmware/common/rffc5071.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index f122dd1b..a2ff97d9 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -122,6 +122,9 @@ void rffc5071_setup(rffc5071_driver_t* const drv) set_RFFC5071_LOCK(drv, 1); #endif + /* Enable reference oscillator standby */ + set_RFFC5071_REFST(drv, 1); + rffc5071_regs_commit(drv); } From 38abc35e23e1854575e17d329550fdb35a082cf1 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Sat, 24 Jan 2026 11:22:42 -0500 Subject: [PATCH 3/8] Output RFFC5072 LD to test point on HackRF One --- firmware/common/rffc5071.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index a2ff97d9..53b7adb6 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -117,7 +117,7 @@ void rffc5071_setup(rffc5071_driver_t* const drv) /* GPOs are active at all times */ set_RFFC5071_GATE(drv, 1); -#ifdef PRALINE +#if defined(PRALINE) || defined(HACKRF_ONE) /* Enable GPO Lock output signal */ set_RFFC5071_LOCK(drv, 1); #endif From 40bdea769b0316f491cb583cbf2ce4975f34600a Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Wed, 28 Jan 2026 19:04:47 -0500 Subject: [PATCH 4/8] Increase RFFC5072 VCO warm-up time TVCO --- firmware/common/rffc5071.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index 53b7adb6..de7f1f70 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -125,6 +125,9 @@ void rffc5071_setup(rffc5071_driver_t* const drv) /* Enable reference oscillator standby */ set_RFFC5071_REFST(drv, 1); + /* Maximize VCO warm-up time */ + set_RFFC5071_TVCO(drv, 31); + rffc5071_regs_commit(drv); } From b516631743dabbd0cf68db7f81fe8350f89c1ddd Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Wed, 28 Jan 2026 19:07:57 -0500 Subject: [PATCH 5/8] Use lower feedback divider when possible This reverts a previous change that was a workaround for tuning glitches in sweep mode. Increase of TVCO is a better solution. --- firmware/common/rffc5071.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index de7f1f70..d4964259 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -285,21 +285,17 @@ uint64_t rffc5071_config_synth(rffc5071_driver_t* const drv, uint64_t lo) fvco = lo << n_lo; /* - * Higher charge pump leakage setting is required above 3.2 GHz. + * Higher charge pump leakage setting and fbkdivlog are required above + * 3.2 GHz. */ if (fvco > (3200 * FREQ_ONE_MHZ)) { + fbkdivlog = 2; set_RFFC5071_PLLCPL(drv, 3); } else { + fbkdivlog = 1; set_RFFC5071_PLLCPL(drv, 2); } - /* - * Supposedly fbkdivlog can be set to 1 when VCO is below 3.2 GHz, but - * this has resulted in tuning instability on some boards, most evident - * in RX sweep mode. - */ - fbkdivlog = 2; - uint64_t tmp_n = (fvco << (24ULL - fbkdivlog)) / REF_FREQ; /* Round to nearest step = ref_MHz / 2**s. For s=6, step=625000 Hz */ From 72636b53f594505de2cd33b592970835ece08a96 Mon Sep 17 00:00:00 2001 From: Mike Walters Date: Thu, 29 Jan 2026 17:58:06 +0000 Subject: [PATCH 6/8] Move dithering disable to rffc5071_setup --- firmware/common/rffc5071.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index d4964259..851ebb28 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -60,7 +60,7 @@ static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { 0x1e84, /* 0F */ 0x89d8, /* 10 */ 0x9d00, /* 11 */ - 0x3a20, /* 12, dithering off */ + 0x2a20, /* 12 */ 0x0000, /* 13 */ 0x0000, /* 14 */ 0x0000, /* 15 */ @@ -125,6 +125,9 @@ void rffc5071_setup(rffc5071_driver_t* const drv) /* Enable reference oscillator standby */ set_RFFC5071_REFST(drv, 1); + /* Disable dither */ + set_RFFC5071_SDM(drv, 0b11); + /* Maximize VCO warm-up time */ set_RFFC5071_TVCO(drv, 31); From ec784cbfbc86b8719e1d434ec04496be7ff4e8f1 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Wed, 28 Jan 2026 18:55:45 -0500 Subject: [PATCH 7/8] Change from 5th order to 3rd order DSM modulator --- firmware/common/rffc5071.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index 851ebb28..f41684bc 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -60,7 +60,7 @@ static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { 0x1e84, /* 0F */ 0x89d8, /* 10 */ 0x9d00, /* 11 */ - 0x2a20, /* 12 */ + 0x2a00, /* 12 */ 0x0000, /* 13 */ 0x0000, /* 14 */ 0x0000, /* 15 */ From 16355f8e5d2c7e8641e7c2641be02dd0c225b681 Mon Sep 17 00:00:00 2001 From: Michael Ossmann Date: Wed, 28 Jan 2026 20:00:44 -0500 Subject: [PATCH 8/8] Update RFFC5072 default registers --- firmware/common/rffc5071.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/firmware/common/rffc5071.c b/firmware/common/rffc5071.c index f41684bc..541dde2a 100644 --- a/firmware/common/rffc5071.c +++ b/firmware/common/rffc5071.c @@ -40,17 +40,17 @@ #include #include "hackrf_core.h" -/* Default register values. */ +/* Default register values from vendor documentation or software. */ static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { - 0xbefa, /* 00 */ + 0xfffb, /* 00 */ 0x4064, /* 01 */ 0x9055, /* 02 */ 0x2d02, /* 03 */ - 0xacbf, /* 04 */ - 0xacbf, /* 05 */ + 0xb0bf, /* 04 */ + 0xb0bf, /* 05 */ 0x0028, /* 06 */ 0x0028, /* 07 */ - 0xff00, /* 08 */ + 0xfc06, /* 08 */ 0x8220, /* 09 */ 0x0202, /* 0A */ 0x0400, /* 0B */ @@ -60,7 +60,7 @@ static const uint16_t rffc5071_regs_default[RFFC5071_NUM_REGS] = { 0x1e84, /* 0F */ 0x89d8, /* 10 */ 0x9d00, /* 11 */ - 0x2a00, /* 12 */ + 0x2a80, /* 12 */ 0x0000, /* 13 */ 0x0000, /* 14 */ 0x0000, /* 15 */