diff --git a/firmware/common/fpga.c b/firmware/common/fpga.c
index 3cd91f12..5ac0bf95 100644
--- a/firmware/common/fpga.c
+++ b/firmware/common/fpga.c
@@ -74,6 +74,8 @@ static size_t fpga_image_read_block_cb(void* _ctx, uint8_t* out_buffer)
 bool fpga_image_load(unsigned int index)
 {
 #if defined(DFU_MODE) || defined(RAM_MODE)
+	selftest.fpga_image_load_ok = false;
+	selftest.report.pass = false;
 	return false;
 #endif
 
@@ -105,6 +107,12 @@ bool fpga_image_load(unsigned int index)
 		&fpga_image_ctx);
 	ssp1_set_mode_max283x();
 
+	// Update selftest result.
+	selftest.fpga_image_load_ok = success;
+	if (!selftest.fpga_image_load_ok) {
+		selftest.report.pass = false;
+	}
+
 	return success;
 }
 
@@ -117,9 +125,15 @@ static uint8_t lfsr_advance(uint8_t v)
 bool fpga_sgpio_selftest()
 {
 #if defined(DFU_MODE) || defined(RAM_MODE)
-	return true;
+	return false;
 #endif
 
+	// Skip if FPGA configuration failed.
+	if (!selftest.fpga_image_load_ok) {
+		selftest.sgpio_rx_ok = false;
+		return false;
+	}
+
 	// Enable PRBS mode.
 	ssp1_set_mode_ice40();
 	ice40_spi_write(&ice40, 0x01, 0x40);
@@ -163,9 +177,15 @@ bool fpga_sgpio_selftest()
 bool fpga_if_xcvr_selftest()
 {
 #if defined(DFU_MODE) || defined(RAM_MODE)
-	return true;
+	return false;
 #endif
 
+	// Skip if FPGA configuration failed.
+	if (!selftest.fpga_image_load_ok) {
+		selftest.xcvr_loopback_ok = false;
+		return false;
+	}
+
 	const size_t num_samples = USB_BULK_BUFFER_SIZE / 2;
 
 	// Set gateware features for the test.
diff --git a/firmware/common/selftest.h b/firmware/common/selftest.h
index f083de3c..118555e9 100644
--- a/firmware/common/selftest.h
+++ b/firmware/common/selftest.h
@@ -41,6 +41,7 @@ typedef struct {
 	uint8_t si5351_rev_id;
 	bool si5351_readback_ok;
 #ifdef PRALINE
+	bool fpga_image_load_ok;
 	bool sgpio_rx_ok;
 	bool xcvr_loopback_ok;
 #endif
diff --git a/firmware/hackrf_usb/hackrf_usb.c b/firmware/hackrf_usb/hackrf_usb.c
index a8adf401..655c4e67 100644
--- a/firmware/hackrf_usb/hackrf_usb.c
+++ b/firmware/hackrf_usb/hackrf_usb.c
@@ -287,13 +287,9 @@ int main(void)
 		halt_and_flash(6000000);
 	}
 #else
-	#if !defined(DFU_MODE) && !defined(RAM_MODE)
-	if (!fpga_image_load(0)) {
-		halt_and_flash(6000000);
-	}
+	fpga_image_load(0);
 	delay_us_at_mhz(100, 204);
 	fpga_sgpio_selftest();
-	#endif
 #endif
 
 #if (defined HACKRF_ONE || defined PRALINE)
diff --git a/firmware/hackrf_usb/usb_api_selftest.c b/firmware/hackrf_usb/usb_api_selftest.c
index 29cbc8a1..926e9272 100644
--- a/firmware/hackrf_usb/usb_api_selftest.c
+++ b/firmware/hackrf_usb/usb_api_selftest.c
@@ -95,6 +95,9 @@ void generate_selftest_report(void)
 	append(&s, &c, "\n");
 #endif
 #ifdef PRALINE
+	append(&s, &c, "FPGA configuration: ");
+	append(&s, &c, selftest.fpga_image_load_ok ? "PASS" : "FAIL");
+	append(&s, &c, "\n");
 	append(&s, &c, "SGPIO RX test: ");
 	append(&s, &c, selftest.sgpio_rx_ok ? "PASS" : "FAIL");
 	append(&s, &c, "\n");