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SDCC ASxxxx Assemblers
and
SDCC ASLINK Relocating Linker
CHAPTER 1 THE ASSEMBLER 1-1
1.1 THE ASXXXX ASSEMBLERS 1-1
1.1.1 Assembly Pass 1 1-2
1.1.2 Assembly Pass 2 1-2
1.1.3 Assembly Pass 3 1-2
1.2 SOURCE PROGRAM FORMAT 1-3
1.2.1 Statement Format 1-3
1.2.1.1 Label Field 1-3
1.2.1.2 Operator Field 1-5
1.2.1.3 Operand Field 1-5
1.2.1.4 Comment Field 1-6
1.3 SYMBOLS AND EXPRESSIONS 1-6
1.3.1 Character Set 1-6
1.3.2 User-Defined Symbols 1-10
1.3.3 Reusable Symbols 1-10
1.3.4 Current Location Counter 1-12
1.3.5 Numbers 1-13
1.3.6 Terms 1-14
1.3.7 Expressions 1-14
1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
1.4.1 .module Directive 1-16
1.4.2 .title Directive 1-16
1.4.3 .sbttl Directive 1-17
1.4.4 .list and .nlist Directives 1-17
1.4.5 .page Directive 1-18
1.4.8 .byte, .db, and .fcb Directives 1-20
1.4.9 .word, .dw, and .fdb Directives 1-21
1.4.10 .3byte and .triple Directives 1-21
1.4.11 .4byte and .quad Directive 1-22
1.4.12 .blkb, .ds, .rmb, and .rs Directives 1-22
1.4.13 .blkw, .blk3, and .blk4 Directives 1-22
1.4.14 .ascii, .str, and .fcc Directives 1-23
1.4.15 .ascis and .strs Directives 1-23
1.4.16 .asciz and .strz Directives 1-24
1.4.18 .radix Directive 1-25
1.4.19 .even Directive 1-25
1.4.20 .odd Directive 1-25
1.4.21 .bndry Directive 1-26
1.4.22 .area Directive 1-27
1.4.24 .org Directive 1-30
1.4.25 .globl Directive 1-31
1.4.26 .local Directive 1-31
1.4.27 .equ, .gblequ, and .lclequ Directives 1-32
1.4.28 .if, .else, and .endif Directives 1-33
1.4.29 .iff, .ift, and .iftf Directives 1-34
1.4.30 .ifxx Directives 1-35
1.4.31 .ifdef Directive 1-36
1.4.32 .ifndef Directive 1-37
1.4.33 .ifb Directive 1-38
1.4.34 .ifnb Directive 1-39
1.4.35 .ifidn Directive 1-40
1.4.36 .ifdif Directive 1-41
Page ii
1.4.37 Alternate .if Directive Forms 1-42
1.4.38 Immediate Conditional Assembly Directives 1-43
1.4.39 .include Directive 1-44
1.4.40 .define and .undefine Directives 1-45
1.4.41 .setdp Directive 1-46
1.4.42 .16bit, .24bit, and .32bit Directives 1-48
1.4.45 .end Directive 1-49
1.5 INVOKING ASXXXX 1-50
1.6 ERRORS 1-52
1.7 LISTING FILE 1-54
1.8 SYMBOL TABLE FILE 1-56
1.9 OBJECT FILE 1-57
CHAPTER 2 THE MACRO PROCESSOR 2-1
2.1 DEFINING MACROS 2-1
2.1.1 .macro Directive 2-2
2.1.2 .endm Directive 2-3
2.1.3 .mexit Directive 2-3
2.2 CALLING MACROS 2-4
2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS 2-5
2.3.1 Macro Nesting 2-6
2.3.2 Special Characters in Macro Arguments 2-7
2.3.3 Passing Numerical Arguments as Symbols 2-7
2.3.4 Number of Arguments in Macro Calls 2-9
2.3.5 Creating Local Symbols Automatically 2-9
2.3.6 Concatenation of Macro Arguments 2-10
2.4 MACRO ATTRIBUTE DIRECTIVES 2-11
2.4.1 .narg Directive 2-12
2.4.2 .nchr Directive 2-13
2.4.3 .ntyp Directive 2-14
2.4.4 .nval Directive 2-14
2.5 INDEFINITE REPEAT BLOCK DIRECTIVES 2-15
2.5.1 .irp Directive 2-16
2.5.2 .irpc Directive 2-17
2.6 REPEAT BLOCK DIRECTIVE 2-18
2.6.1 .rept 2-18
2.7 MACRO DELETION DIRECTIVE 2-19
2.7.1 .mdelete 2-19
2.8 MACRO INVOCATION DETAILS 2-19
2.9 BUILDING A MACRO LIBRARY 2-20
2.9.1 .mlib Macro Directive 2-21
2.9.2 .mcall Macro Directive 2-22
2.10 EXAMPLE MACRO CROSS ASSEMBLERS 2-24
CHAPTER 3 THE LINKER 3-1
3.1 ASLINK RELOCATING LINKER 3-1
3.2 INVOKING ASLINK 3-2
3.3 LIBRARY PATH(S) AND FILE(S) 3-5
3.4 ASLINK PROCESSING 3-6
Page iii
3.6 ASXXXX VERSION 3.XX LINKING 3-15
3.6.1 Object Module Format 3-15
3.6.2 Header Line 3-15
3.6.3 Module Line 3-16
3.6.4 Area Line 3-16
3.6.5 Symbol Line 3-16
3.6.6 T Line 3-16
3.6.7 R Line 3-17
3.6.8 P Line 3-17
3.6.9 24-Bit and 32-Bit Addressing 3-18
3.6.10 ASlink V3.xx Error Messages 3-18
3.7 INTEL IHX OUTPUT FORMAT (16-BIT) 3-21
3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT) 3-22
3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT) 3-23
CHAPTER 4 BUILDING ASXXXX AND ASLINK 4-1
4.1 BUILDING ASXXXX AND ASLINK WITH LINUX 4-2
4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN 4-2
4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP 4-3
4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S
TURBO C++ 3.0 4-3
4.4.1 Graphical User Interface 4-3
4.4.2 Command Line Interface 4-4
4.5 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL C++ 6.0 4-5
4.5.1 Graphical User Interface 4-5
4.5.2 Command Line Interface 4-5
4.6 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2005 4-6
4.6.1 Graphical User Interface 4-6
4.6.2 Command Line Interface 4-6
4.7 BUILDING ASXXXX AND ASLINK WITH
MS VISUAL STUDIO 2010 4-7
4.7.1 Graphical User Interface 4-7
4.7.2 Command Line Interface 4-7
4.8 BUILDING ASXXXX AND ASLINK WITH
OPEN WATCOM V1.9 4-8
Page iv
4.8.1 Graphical User Interface 4-8
4.8.2 Command Line Interface 4-8
4.9 BUILDING ASXXXX AND ASLINK WITH
SYMANTEC C/C++ V7.2 4-9
4.9.1 Graphical User Interface 4-9
4.9.2 Command Line Interface 4-9
4.10 THE _CLEAN.BAT AND _PREP.BAT FILES 4-10
APPENDIX AK AS68(HC[S])08 ASSEMBLER AK-1
AK.1 PROCESSOR SPECIFIC DIRECTIVES AK-1
AK.1.1 .hc08 Directive AK-1
AK.1.2 .hcs08 Directive AK-1
AK.1.3 .6805 Directive AK-2
AK.1.4 .hc05 Directive AK-2
AK.1.5 The .__.CPU. Variable AK-2
AK.2 68HC(S)08 REGISTER SET AK-3
AK.3 68HC(S)08 INSTRUCTION SET AK-3
AK.3.1 Control Instructions AK-4
AK.3.2 Bit Manipulation Instructions AK-4
AK.3.3 Branch Instructions AK-4
AK.3.4 Complex Branch Instructions AK-5
AK.3.5 Read-Modify-Write Instructions AK-5
AK.3.6 Register\Memory Instructions AK-6
AK.3.7 Double Operand Move Instruction AK-6
AK.3.8 16-Bit <H:X> Index Register Instructions AK-6
AK.3.9 Jump and Jump to Subroutine Instructions AK-6
Page ix
APPENDIX AR AS8051 ASSEMBLER AR-1
AR.1 ACKNOWLEDGMENT AR-1
AR.2 8051 REGISTER SET AR-1
AR.3 8051 INSTRUCTION SET AR-2
AR.3.1 Inherent Instructions AR-2
AR.3.2 Move Instructions AR-3
AR.3.3 Single Operand Instructions AR-3
AR.3.4 Two Operand Instructions AR-4
AR.3.5 Call and Return Instructions AR-4
AR.3.6 Jump Instructions AR-4
AR.3.7 Predefined Symbols: SFR Map AR-5
AR.3.8 Predefined Symbols: SFR Bit Addresses AR-6
AR.3.9 Predefined Symbols: Control Bits AR-7
Page x
APPENDIX AT AS8XCXXX ASSEMBLER AT-1
AT.1 ACKNOWLEDGMENTS AT-1
AT.2 AS8XCXXX ASSEMBLER DIRECTIVES AT-1
AT.2.1 Processor Selection Directives AT-1
AT.2.2 .cpu Directive AT-2
AT.2.3 Processor Addressing Range Directives AT-3
AT.2.4 The .__.CPU. Variable AT-3
AT.2.5 DS80C390 Addressing Mode Directive AT-4
AT.2.6 The .msb Directive AT-4
AT.3 DS8XCXXX REGISTER SET AT-6
AT.4 DS8XCXXX INSTRUCTION SET AT-6
AT.4.1 Inherent Instructions AT-7
AT.4.2 Move Instructions AT-7
AT.4.3 Single Operand Instructions AT-7
AT.4.4 Two Operand Instructions AT-8
AT.4.5 Call and Return Instructions AT-8
AT.4.6 Jump Instructions AT-8
AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS AT-9
AT.5.1 SFR Map AT-9
AT.5.2 Bit Addressable Registers: Generic AT-10
AT.5.3 Bit Addressable Registers: Specific AT-11
AT.5.4 Optional Symbols: Control Bits AT-12
AT.6 DS80C310 SPECIAL FUNCTION REGISTERS AT-13
AT.6.1 SFR Map AT-13
AT.6.2 Bit Addressable Registers: Generic AT-14
AT.6.3 Bit Addressable Registers: Specific AT-15
AT.6.4 Optional Symbols: Control Bits AT-16
AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS AT-17
AT.7.1 SFR Map AT-17
AT.7.2 Bit Addressable Registers: Generic AT-18
AT.7.3 Bit Addressable Registers: Specific AT-19
AT.7.4 Optional Symbols: Control Bits AT-20
AT.8 DS80C390 SPECIAL FUNCTION REGISTERS AT-21
AT.8.1 SFR Map AT-21
AT.8.2 Bit Addressable Registers: Generic AT-22
AT.8.3 Bit Addressable Registers: Specific AT-23
AT.8.4 Optional Symbols: Control Bits AT-24
AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS AT-26
AT.9.1 SFR Map AT-26
AT.9.2 Bit Addressable Registers: Generic AT-27
AT.9.3 Bit Addressable Registers: Specific AT-28
AT.9.4 Optional Symbols: Control Bits AT-29
AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS AT-30
AT.10.1 SFR Map AT-30
AT.10.2 Bit Addressable Registers: Generic AT-31
AT.10.3 Bit Addressable Registers: Specific AT-32
AT.10.4 Optional Symbols: Control Bits AT-33
AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS AT-34
AT.11.1 SFR Map AT-34
AT.11.2 Bit Addressable Registers: Generic AT-36
AT.11.3 Bit Addressable Registers: Specific AT-37
AT.11.4 Optional Symbols: Control Bits AT-39
Page xi
APPENDIX AY ASGB ASSEMBLER AY-1
AY.1 ACKNOWLEDGEMENT AY-1
AY.2 INTRODUCTION AY-1
AY.3 GAMEBOY REGISTER SET AND CONDITIONS AY-1
AY.4 GAMEBOY INSTRUCTION SET AY-2
AY.4.1 .tile Directive AY-2
AY.4.2 Potentially Controversial Mnemonic Selection AY-4
AY.4.2.1 Auto-Indexing Loads AY-4
AY.4.2.2 Input and Output Operations AY-4
AY.4.2.3 The 'stop' Instruction AY-5
AY.4.3 Inherent Instructions AY-5
AY.4.4 Implicit Operand Instructions AY-5
AY.4.5 Load Instructions AY-6
AY.4.6 Call/Return Instructions AY-6
AY.4.7 Jump Instructions AY-6
AY.4.8 Bit Manipulation Instructions AY-6
AY.4.9 Input and Output Instructions AY-7
AY.4.10 Register Pair Instructions AY-7
APPENDIX BC ASRAB ASSEMBLER BC-1
BC.1 ACKNOWLEDGMENT BC-1
BC.2 PROCESSOR SPECIFIC DIRECTIVES BC-1
BC.2.1 .r2k Directive BC-2
BC.2.2 .hd64 Directive BC-2
BC.2.3 .z80 Directive BC-2
BC.2.4 The .__.CPU. Variable BC-3
BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS BC-4
BC.3.1 Instruction Symbols BC-4
BC.3.2 Rabbit Instructions BC-6
BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS BC-8
BC.4.1 Inherent Instructions BC-9
BC.4.2 Implicit Operand Instructions BC-9
BC.4.3 Load Instruction BC-10
BC.4.4 Call/Return Instructions BC-10
BC.4.5 Jump and Jump to Subroutine Instructions BC-10
BC.4.6 Bit Manipulation Instructions BC-11
BC.4.7 Interrupt Mode and Reset Instructions BC-11
BC.4.8 Input and Output Instructions BC-11
BC.4.9 Register Pair Instructions BC-11
BC.4.10 HD64180 Specific Instructions BC-12
Page xiii
APPENDIX BI ASZ80 ASSEMBLER BI-1
BI.1 .z80 DIRECTIVE BI-1
BI.2 .hd64 DIRECTIVE BI-1
BI.3 THE .__.CPU. VARIABLE BI-2
BI.4 Z80 REGISTER SET AND CONDITIONS BI-2
BI.5 Z80 INSTRUCTION SET BI-3
BI.5.1 Inherent Instructions BI-4
BI.5.2 Implicit Operand Instructions BI-4
BI.5.3 Load Instruction BI-5
BI.5.4 Call/Return Instructions BI-5
BI.5.5 Jump and Jump to Subroutine Instructions BI-5
BI.5.6 Bit Manipulation Instructions BI-6
BI.5.7 Interrupt Mode and Reset Instructions BI-6
BI.5.8 Input and Output Instructions BI-6
BI.5.9 Register Pair Instructions BI-6
BI.5.10 HD64180/Z180 Specific Instructions BI-7
Page 2
P R E F A C E
The ASxxxx assemblers were written following the style of
several unfinished cross assemblers found in the Digital Equip-
ment Corporation Users Society (DECUS) distribution of the C
programming language. The incomplete DECUS code was provided
with no documentation as to the input syntax or the output
format. I wish to thank the author for inspiring me to begin
the development of this set of assemblers.
The ASLINK program was written as a companion to the ASxxxx
assemblers, its design and implementation was not derived from
any other work.
I would greatly appreciate receiving the details of any
changes, additions, or errors pertaining to these programs and
will attempt to incorporate any fixes or generally useful
changes in a future update to these programs.
Alan R. Baldwin
Kent State University
Physics Department
Kent, Ohio 44242
U.S.A.
http://shop-pdp.net
http://shop-pdp.kent.edu/
baldwin@shop-pdp.net
baldwin@shop-pdp.kent.edu
baldwin@kent.edu
tel: (330) 672 2531
fax: (330) 672 2959
Page 3
E N D U S E R L I C E N S E A G R E E M E N T
Copyright (C) 1989-2012 Alan R. Baldwin
This program is free software: you can redistribute it
and/or modify it under the terms of the GNU General Public
License as published by the Free Software Foundation, either
version 3 of the License, or (at your option) any later version.
This program is distributed in the hope that it will be use-
ful, but WITHOUT ANY WARRANTY; without even the implied war-
ranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
See the GNU General Public License for more details.
You should have received a copy of the GNU General Public
License along with this program. If not, see
<http://www.gnu.org/licenses/>.
Page 4
C O N T R I B U T O R S
Thanks to Marko Makela for his contribution of the AS6500 cross
assembler.
Marko Makela
Sillitie 10 A
01480 Vantaa
Finland
Internet: Marko dot Makela at Helsinki dot Fi
EARN/BitNet: msmakela at finuh
Thanks to John Hartman for his contribution of the AS8051 cross
assembler and updates to the ASxxxx and ASLINK internals.
John L. Hartman
jhartman at compuserve dot com
noice at noicedebugger dot com
Thanks to G. Osborn for his contributions to LKS19.C and
LKIHX.C.
G. Osborn
gary at s-4 dot com
Thanks to Ken Hornstein for his contribution of object libraries
contained in LKLIBR.C.
Ken Hornstein
kenh at cmf dot nrl dot navy dot mil
Page 5
Thanks to Bill McKinnon for his contributions to the AS8XCXXX
cross assembler for the DS8XCXXX series of microprocessors.
Bill McKinnon
w_mckinnon at conknet dot com
Thanks to Roger Ivie for his contribution of the ASGB cross as-
sembler for the GameBoy.
Roger Ivie
ivie at cc dot usu dot edu
Thanks to Uwe Steller for his contribution of the AS740 cross
assembler.
Uwe Stellar
Uwe dot Steller at t-online dot de
Thanks to Shujen Chen for his contribution of the AS1802 cross
assembler.
Shugen Chen
DeVry University
Tinley Park IL
schen at tp dot devry dot edu
Thanks to Edgar Puehringer for his contribution of the AS61860
cross assembler.
Edgar Puehringer
edgar_pue at yahoo dot com
Page 6
Thanks to Ulrich Raich and Razaq Ijoduola for their contribution
of the ASRAB cross assembler.
Ulrich Raich and Razaq Ijoduola
PS Division
CERN
CH-1211 Geneva-23
Ulrich dot Raich at cern dot ch
Thanks to Patrick Head for his contribution of the ASEZ80 cross
assembler.
Patrick Head
patrick at phead dot net
Thanks to Boisy G. Pitre for contributing the .ifeq, .ifne,
.ifgt, .iflt, .ifle, and .ifge conditional directives and the
Tandy Color Computer Disk Basic binary output for ASLINK.
Boisy G. Pitre
boisy at boisypitre dot com
Thanks to Mike McCarty for his contributions to the processor
cycle count option of the ASxxxx Assemblers.
Mike McCarty
mike dot mccarty at sbcglobal dot net
Thanks to Mengjin Su for his contribution of the PIC18Fxxx Ex-
tended Instructions.
Mengjin Su
msu at micron dot com
Page 7
Thanks to Carl Rash for his contribution of the Visual Studio
2010 project files.
Carl Rash
crash at triad dot rr dot com
Page 8
ASxxxx Cross Assemblers, Version 5.05, August 2012
Submitted by Alan R. Baldwin,
Kent State University, Kent, Ohio
Operating System: Linux, Windows, MS-DOS
or other supporting ANSI C.
Source Langauge: C
Abstract:
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. This collection
contains cross assemblers for the 1802, S2650, SC/MP, MPS430,
61860, 6500, 6800(6802/6808), 6801(6803/HD6303), 6804, 6805,
68HC(S)08, 6809, 68HC11, 68HC(S)12, 68HC16, 740,
8048(8041/8022/8021) 8051, 8085(8080), DS8xCxxx, AVR, EZ80,
F2MC8L/FX, F8/3870, GameBoy(Z80), H8/3xx, Cypress PSoC(M8C),
PIC, Rabbit 2000/3000, asst6, asst7, asst8, Z8, and Z80(HD64180)
series microprocessors. Each assembler has a device specific
section which includes: (1) device description, byte order, and
file extension information, (2) a table of assembler general
directives, special directives, assembler mnemonics and asso-
ciated operation codes, (3) machine specific code for processing
the device mnemonics, addressing modes, and special directives.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features: (1) alpha-
betized, formatted symbol table listings, (2) relocatable object
modules, (3) global symbols for linking object modules, (4) con-
ditional assembly directives, (5) reusable local symbols, (6)
include-file processing, and (7) a general macro processing
facility.
The companion program ASLINK is a relocating linker perform-
ing the following functions: (1) bind multiple object modules
into a single memory image, (2) resolve inter-module symbol
references, (3) resolve undefined symbols from specified
librarys of object modules, (4) process absolute, relative, con-
catenated, and overlay attributes in data and program sections,
(5) perform byte and word program-counter relative (pc or pcr)
addressing calculations, (6) define absolute symbol values at
link time, (7) define absolute area base address values at link
time, (8) produce an Intel Hex record, Motorola S record or
Tandy CoCo Disk Basic output file, (9) produce a map of the
linked memory image, and (10) update the ASxxxx assembler
listing files with the absolute linked addresses and data.
Page 9
The assemblers and linker have been tested using Linux and
DJGPP, Cygwin, Symantec C/C++ V7.2, Borland Turbo C++ 3.0, Open
Watcom V1.9, VC6, Visual Studio 2005, and Visual Studio 2010.
Complete source code and documentation for the assemblers and
linker is included with the distribution. Additionally, test
code for each assembler and several microprocessor monitors (
ASSIST05 for the 6805, MONDEB and ASSIST09 for the 6809, and
BUFFALO 2.5 for the 6811) are included as working examples of
use of these assemblers.
CHAPTER 1
THE ASSEMBLER
1.1 THE ASXXXX ASSEMBLERS
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. Each assembler has
a device specific section which includes:
1. device description, byte order, and file extension in-
formation
2. a table of the assembler general directives, special
device directives, assembler mnemonics and associated
operation codes
3. machine specific code for processing the device mnemon-
ics, addressing modes, and special directives
The device specific information is detailed in the appendices.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features:
1. Command string control of assembly functions
2. Alphabetized, formatted symbol table listing
3. Relocatable object modules
4. Global symbols for linking object modules
5. Conditional assembly directives
THE ASSEMBLER PAGE 1-2
THE ASXXXX ASSEMBLERS
6. Program sectioning directives
ASxxxx assembles one or more source files into a single relo-
catable ascii object file. The output of the ASxxxx assemblers
consists of an ascii relocatable object file(*.rel), an assembly
listing file(*.lst), and a symbol file(*.sym).
1.1.1 Assembly Pass 1
During pass 1, ASxxxx opens all source files and performs a
rudimentary assembly of each source statement. During this pro-
cess all symbol tables are built, program sections defined, and
number of bytes for each assembled source line is estimated.
At the end of pass 1 all undefined symbols may be made global
(external) using the ASxxxx switch -g, otherwise undefined sym-
bols will be flagged as errors during succeeding passes.
1.1.2 Assembly Pass 2
During pass 2 the ASxxxx assembler resolves forward refer-
ences and determines the number of bytes for each assembled
line. The number of bytes used by a particular assembler in-
struction may depend upon the addressing mode, whether the in-
struction allows multiple forms based upon the relative distance
to the addressed location, or other factors. Pass 2 resolves
these cases and determines the address of all symbols.
1.1.3 Assembly Pass 3
Pass 3 by the assembler generates the listing file, the relo-
catable output file, and the symbol tables. Also during pass 3
the errors will be reported.
The relocatable object file is an ascii file containing sym-
bol references and definitions, program area definitions, and
the relocatable assembled code, the linker ASLINK will use this
information to generate an absolute load file (Intel or Motorola
formats).
THE ASSEMBLER PAGE 1-3
SOURCE PROGRAM FORMAT
1.2 SOURCE PROGRAM FORMAT
1.2.1 Statement Format
A source program is composed of assembly-language statements.
Each statement must be completed on one line. A line may con-
tain a maximum of 128 characters, longer lines are truncated and
lost.
An ASxxxx assembler statement may have as many as four
fields. These fields are identified by their order within the
statement and/or by separating characters between fields. The
general format of the ASxxxx statement is:
[label:] Operator Operand [;Comment(s)]
The label and comment fields are optional. The operator and
operand fields are interdependent. The operator field may be an
assembler directive or an assembly mnemonic. The operand field
may be optional or required as defined in the context of the
operator.
ASxxxx interprets and processes source statements one at a
time. Each statement causes a particular operation to be per-
formed.
1.2.1.1 Label Field -
A label is a user-defined symbol which is assigned the value
of the current location counter and entered into the user de-
fined symbol table. The current location counter is used by
ASxxxx to assign memory addresses to the source program state-
ments as they are encountered during the assembly process. Thus
a label is a means of symbolically referring to a specific
statement.
When a program section is absolute, the value of the current
location counter is absolute; its value references an absolute
memory address. Similarly, when a program section is relocat-
able, the value of the current location counter is relocatable.
A relocation bias calculated at link time is added to the ap-
parent value of the current location counter to establish its
effective absolute address at execution time. (The user can
also force the linker to relocate sections defined as absolute.
This may be required under special circumstances.)
If present, a label must be the first field in a source
statement and must be terminated by a colon (:). For example,
THE ASSEMBLER PAGE 1-4
SOURCE PROGRAM FORMAT
if the value of the current location counter is absolute
01F0(H), the statement:
abcd: nop
assigns the value 01F0(H) to the label abcd. If the location
counter value were relocatable, the final value of abcd would be
01F0(H)+K, where K represents the relocation bias of the program
section, as calculated by the linker at link time.
More than one label may appear within a single label field.
Each label so specified is assigned the same address value. For
example, if the value of the current location counter is
1FF0(H), the multiple labels in the following statement are each
assigned the value 1FF0(H):
abcd: aq: $abc: nop
Multiple labels may also appear on successive lines. For ex-
ample, the statements
abcd:
aq:
$abc: nop
likewise cause the same value to be assigned to all three la-
bels.
A double colon (::) defines the label as a global symbol.
For example, the statement
abcd:: nop
establishes the label abcd as a global symbol. The distinguish-
ing attribute of a global symbol is that it can be referenced
from within an object module other than the module in which the
symbol is defined. References to this label in other modules
are resolved when the modules are linked as a composite execut-
able image.
The legal characters for defining labels are:
A through Z
a through z
0 through 9
. (Period)
$ (Dollar sign)
_ (underscore)
A label may be any length, however only the first 79
characters are significant and, therefore must be unique among
all labels in the source program (not necessarily among
THE ASSEMBLER PAGE 1-5
SOURCE PROGRAM FORMAT
separately compiled modules). An error code(s) (m or p) will be
generated in the assembly listing if the first 79 characters in
two or more labels are the same. The m code is caused by the
redeclaration of the symbol or its reference by another state-
ment. The p code is generated because the symbols location is
changing on each pass through the source file.
The label must not start with the characters 0-9, as this
designates a reusable symbol with special attributes described
in a later section.
The label must not start with the sequence $$, as this
represents the temporary radix 16 for constants.
1.2.1.2 Operator Field -
The operator field specifies the action to be performed. It
may consist of an instruction mnemonic (op code) or an assembler
directive.
When the operator is an instruction mnemonic, a machine in-
struction is generated and the assembler evaluates the addresses
of the operands which follow. When the operator is a directive
ASxxxx performs certain control actions or processing operations
during assembly of the source program.
Leading and trailing spaces or tabs in the operator field
have no significance; such characters serve only to separate
the operator field from the preceeding and following fields.
An operator is terminated by a space, tab or end of line.
1.2.1.3 Operand Field -
When the operator is an instruction mnemonic (op code), the
operand field contains program variables that are to be
evaluated/manipulated by the operator.
Operands may be expressions or symbols, depending on the
operator. Multiple expressions used in the operand fields may
be separated by a comma. An operand should be preceeded by an
operator field; if it is not, the statement will give an error
(q or o). All operands following instruction mnemonics are
treated as expressions.
The operand field is terminated by a semicolon when the field
is followed by a comment. For example, in the following
statement:
label: lda abcd,x ;Comment field
THE ASSEMBLER PAGE 1-6
SOURCE PROGRAM FORMAT
the tab between lda and abcd terminates the operator field and
defines the beginning of the operand field; a comma separates
the operands abcd and x; and a semicolon terminates the operand
field and defines the beginning of the comment field. When no
comment field follows, the operand field is terminated by the
end of the source line.
1.2.1.4 Comment Field -
The comment field begins with a semicolon and extends through
the end of the line. This field is optional and may contain any
7-bit ascii character except null.
Comments do not affect assembly processing or program execu-
tion.
1.3 SYMBOLS AND EXPRESSIONS
This section describes the generic components of the ASxxxx
assemblers: the character set, the conventions observed in con-
structing symbols, and the use of numbers, operators, and ex-
pressions.
1.3.1 Character Set
The following characters are legal in ASxxxx source programs:
1. The letters A through Z. Both upper- and lower-case
letters are acceptable. The assemblers, by default,
are case sensitive, i.e. ABCD and abcd are not the
same symbols. (The assemblers can be made case insen-
sitive by using the -z command line option.)
2. The digits 0 through 9
3. The characters . (period), $ (dollar sign), and _ (un-
derscore).
4. The special characters listed in Tables 1 through 6.
Tables 1 through 6 describe the various ASxxxx label and
field terminators, assignment operators, operand separators, as-
sembly, unary, binary, and radix operators.
THE ASSEMBLER PAGE 1-7
SYMBOLS AND EXPRESSIONS
Table 1 Label Terminators and Assignment Operators
----------------------------------------------------------------
: Colon Label terminator.
:: Double colon Label Terminator; defines the
label as a global label.
= Equal sign Direct assignment operator.
== Global equal Direct assignment operator; de-
fines the symbol as a global
symbol.
=: Local equal Direct assignment operator; de-
fines the symbol as a local sym-
bol.
----------------------------------------------------------------
Table 2 Field Terminators and Operand Separators
----------------------------------------------------------------
Tab Item or field terminator.
Space Item or field terminator.
, Comma Operand field separator.
; Semicolon Comment field indicator.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-8
SYMBOLS AND EXPRESSIONS
Table 3 Assembler Operators
----------------------------------------------------------------
# Number sign Immediate expression indicator.
. Period Current location counter.
( Left parenthesis Expression delimiter.
) Right parenthesis Expression delimeter.
----------------------------------------------------------------
Table 4 Unary Operators
----------------------------------------------------------------
< Left bracket <FEDC Produces the lower byte
value of the expression.
(DC)
> Right bracket >FEDC Produces the upper byte
value of the expression.
(FE)
+ Plus sign +A Positive value of A
- Minus sign -A Produces the negative
(2's complement) of A.
~ Tilde ~A Produces the 1's comple-
ment of A.
' Single quote 'D Produces the value of
the character D.
" Double quote "AB Produces the double byte
value for AB.
\ Backslash '\n Unix style characters
\b, \f, \n, \r, \t
or '\001 or octal byte values.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-9
SYMBOLS AND EXPRESSIONS
Table 5 Binary Operators
----------------------------------------------------------------
<< Double 0800 << 4 Produces the 4 bit
Left bracket left-shifted value of
0800. (8000)
>> Double 0800 >> 4 Produces the 4 bit
Right bracket right-shifted value of
0800. (0080)
+ Plus sign A + B Arithmetic Addition
operator.
- Minus sign A - B Arithmetic Subtraction
operator.
* Asterisk A * B Arithmetic Multiplica-
tion operator.
/ Slash A / B Arithmetic Division
operator.
& Ampersand A & B Logical AND operator.
| Bar A | B Logical OR operator.
% Percent sign A % B Modulus operator.
^ Up arrow or A ^ B EXCLUSIVE OR operator.
circumflex
----------------------------------------------------------------
Table 6 Temporary Radix Operators
----------------------------------------------------------------
$%, 0b, 0B Binary radix operator.
$&, 0o, 0O, 0q, 0Q Octal radix operator.
$#, 0d, 0D Decimal radix operator.
$$, 0h, 0H, 0x, 0X Hexadecimal radix operator.
Potential ambiguities arising from the use of 0b and 0d
as temporary radix operators may be circumvented by
THE ASSEMBLER PAGE 1-10
SYMBOLS AND EXPRESSIONS
preceding all non-prefixed hexadecimal numbers with 00.
Leading 0's are required in any case where the first
hexadecimal digit is abcdef as the assembler will treat
the letter sequence as a label.
----------------------------------------------------------------
1.3.2 User-Defined Symbols
User-defined symbols are those symbols that are equated to a
specific value through a direct assignment statement or appear
as labels. These symbols are added to the User Symbol Table as
they are encountered during assembly.
The following rules govern the creation of user-defined symbols:
1. Symbols can be composed of alphanumeric characters,
dollar signs ($), periods (.), and underscores (_)
only.
2. The first character of a symbol must not be a number
(except in the case of reusable symbols).
3. The first 79 characters of a symbol must be unique. A
symbol can be written with more than 79 legal
characters, but the 80th and subsequent characters are
ignored.
4. Spaces and Tabs must not be embedded within a symbol.
1.3.3 Reusable Symbols
Reusable symbols are specially formatted symbols used as la-
bels within a block of coding that has been delimited as a reus-
able symbol block. Reusable symbols are of the form n$, where n
is a decimal integer from 0 to 65535, inclusive. Examples of
reusable symbols are:
1$
27$
138$
244$
THE ASSEMBLER PAGE 1-11
SYMBOLS AND EXPRESSIONS
The range of a reusable symbol block consists of those state-
ments between two normally constructed symbolic labels. Note
that a statement of the form:
ALPHA = EXPRESSION
is a direct assignment statement but does not create a label and
thus does not delimit the range of a reusable symbol block.
Note that the range of a reusable symbol block may extend
across program areas.
Reusable symbols provide a convenient means of generating la-
bels for branch instructions and other such references within
reusable symbol blocks. Using reusable symbols reduces the pos-
sibility of symbols with multiple definitions appearing within a
user program. In addition, the use of reusable symbols dif-
ferentiates entry-point labels from other labels, since reusable
labels cannot be referenced from outside their respective symbol
blocks. Thus, reusable symbols of the same name can appear in
other symbol blocks without conflict. Reusable symbols require
less symbol table space than normal symbols. Their use is
recommended.
The use of the same reusable symbol within a symbol block
will generate one or both of the m or p errors.
Example of reusable symbols:
a: ldx #atable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
b: ldx #btable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
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SYMBOLS AND EXPRESSIONS
1.3.4 Current Location Counter
The period (.) is the symbol for the current location coun-
ter. When used in the operand field of an instruction, the
period represents the address of the first byte of the
instruction:
AS: ldx #. ;The period (.) refers to
;the address of the ldx
;instruction.
When used in the operand field of an ASxxxx directive, it
represents the address of the current byte or word:
QK = 0
.word 0xFFFE,.+4,QK ;The operand .+4 in the .word
;directive represents a value
;stored in the second of the
;three words during assembly.
If we assume the current value of the program counter is
0H0200, then during assembly, ASxxxx reserves three words of
storage starting at location 0H0200. The first value, a hex-
idecimal constant FFFE, will be stored at location 0H0200. The
second value represented by .+4 will be stored at location
0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
value defined by the symbol QK will be placed at location
0H0204.
At the beginning of each assembly pass, ASxxxx resets the lo-
cation counter. Normally, consecutive memory locations are as-
signed to each byte of object code generated. However, the
value of the location counter can be changed through a direct
assignment statement of the following form:
. = . + expression
The new location counter can only be specified relative to
the current location counter. Neglecting to specify the current
program counter along with the expression on the right side of
the assignment operator will generate the (.) error. (Absolute
program areas may use the .org directive to specify the absolute
location of the current program counter.)
The following coding illustrates the use of the current location
counter:
.area CODE1 (ABS) ;program area CODE1
;is ABSOLUTE
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SYMBOLS AND EXPRESSIONS
.org 0H100 ;set location to
;0H100 absolute
num1: ldx #.+0H10 ;The label num1 has
;the value 0H100.
;X is loaded with
;0H100 + 0H10
.org 0H130 ;location counter
;set to 0H130
num2: ldy #. ;The label num2 has
;the value 0H130.
;Y is loaded with
;value 0H130.
.area CODE2 (REL) ;program area CODE2
;is RELOCATABLE
. = . + 0H20 ;Set location counter
;to relocatable 0H20 of
;the program section.
num3: .word 0 ;The label num3 has
;the value
;of relocatable 0H20.
. = . + 0H40 ;will reserve 0H40
;bytes of storage as will
.blkb 0H40 ;or
.blkw 0H20
The .blkb and .blkw directives are the preferred methods of
allocating space.
1.3.5 Numbers
ASxxxx assumes that all numbers in the source program are to
be interpreted in decimal radix unless otherwise specified. The
.radix directive may be used to specify the default as octal,
decimal, or hexadecimal. Individual numbers can be designated
as binary, octal, decimal, or hexadecimal through the temporary
radix prefixes shown in table 6.
Negative numbers must be preceeded by a minus sign; ASxxxx
translates such numbers into two's complement form. Positive
numbers may (but need not) be preceeded by a plus sign.
THE ASSEMBLER PAGE 1-14
SYMBOLS AND EXPRESSIONS
Numbers are always considered to be absolute values, therefor
they are never relocatable.
1.3.6 Terms
A term is a component of an expression and may be one of the
following:
1. A number.
2. A symbol:
1. A period (.) specified in an expression causes the
current location counter to be used.
2. A User-defined symbol.
3. An undefined symbol is assigned a value of zero and
inserted in the User-Defined symbol table as an un-
defined symbol.
3. A single quote followed by a single ascii character, or
a double quote followed by two ascii characters.
4. An expression enclosed in parenthesis. Any expression
so enclosed is evaluated and reduced to a single term
before the remainder of the expression in which it ap-
pears is evaluated. Parenthesis, for example, may be
used to alter the left-to-right evaluation of expres-
sions, (as in A*B+C versus A*(B+C)), or to apply a un-
ary operator to an entire expression (as in -(A+B)).
5. A unary operator followed by a symbol or number.
1.3.7 Expressions
Expressions are combinations of terms joined together by
binary operators. Expressions reduce to a value. The evalua-
tion of an expression includes the determination of its attri-
butes. A resultant expression value may be one of three types
(as described later in this section): relocatable, absolute,
and external.
THE ASSEMBLER PAGE 1-15
SYMBOLS AND EXPRESSIONS
Expressions are evaluate with an operand hierarchy as follows:
* / % multiplication,
division, and
modulus first.
+ - addition and
subtraction second.
<< >> left shift and
right shift third.
^ exclusive or fourth.
& logical and fifth.
| logical or last
except that unary operators take precedence over binary
operators.
A missing or illegal operator terminates the expression
analysis, causing error codes (o) and/or (q) to be generated
depending upon the context of the expression itself.
At assembly time the value of an external (global) expression
is equal to the value of the absolute part of that expression.
For example, the expression external+4, where 'external' is an
external symbol, has the value of 4. This expression, however,
when evaluated at link time takes on the resolved value of the
symbol 'external', plus 4.
Expressions, when evaluated by ASxxxx, are one of three
types: relocatable, absolute, or external. The following dis-
tinctions are important:
1. An expression is relocatable if its value is fixed re-
lative to the base address of the program area in which
it appears; it will have an offset value added at link
time. Terms that contain labels defined in relocatable
program areas will have a relocatable value; simi-
larly, a period (.) in a relocatable program area,
representing the value of the current program location
counter, will also have a relocatable value.
2. An expression is absolute if its value is fixed. An
expression whose terms are numbers and ascii characters
will reduce to an absolute value. A relocatable ex-
pression or term minus a relocatable term, where both
elements being evaluated belong to the same program
area, is an absolute expression. This is because every
THE ASSEMBLER PAGE 1-16
SYMBOLS AND EXPRESSIONS
term in a program area has the same relocation bias.
When one term is subtracted from the other the reloca-
tion bias is zero.
3. An expression is external (or global) if it contains a
single global reference (plus or minus an absolute ex-
pression value) that is not defined within the current
program. Thus, an external expression is only par-
tially defined following assembly and must be resolved
at link time.
1.4 GENERAL ASSEMBLER DIRECTIVES
An ASxxxx directive is placed in the operator field of the
source line. Only one directive is allowed per source line.
Each directive may have a blank operand field or one or more
operands. Legal operands differ with each directive.
1.4.1 .module Directive
Format:
.module name
The .module directive causes the name to be included in the
assemblers output file as an identifier for this particular ob-
ject module. The name may be from 1 to 79 characters in length.
The name may not have any embedded white space (spaces or tabs).
Only one identifier is allowed per assembled module. The main
use of this directive is to allow the linker to report a
modules' use of undefined symbols. At link time all undefined
symbols are reported and the modules referencing them are
listed.
1.4.2 .title Directive
Format:
.title string
The .title directive provides a character string to be placed
on the second line of each page during listing. The string be-
gins with the first non white space character (after any space
or tab) and ends with the end of the line.
THE ASSEMBLER PAGE 1-17
GENERAL ASSEMBLER DIRECTIVES
1.4.3 .sbttl Directive
Format:
.sbttl string
The .sbttl directive provides a character string to be placed
on the third line of each page during listing. The string be-
gins with the first non white space character (after any space
or tab) and ends with the end of the line.
1.4.4 .list and .nlist Directives
Format:
.list ;Basic .list
.list expr ;with expression
.list (arg1,arg2,...,argn) ;with sublist options
.nlist ;Basic .nlist
.nlist expr ;with expression
.nlist (arg1,arg2,...,argn) ;with sublist options
The .list and .nlist directives control the listing output to
the .lst file. The directives have the following sublist
options:
err - errors
loc - program location
bin - binary output
eqt - symbol or .if evaluation
cyc - opcode cycle count
lin - source line number
src - source line text
pag - pagination
lst - .list/.nlist line listing
md - macro definition listing
me - macro expansion listing
meb - macro expansion binary listing
! - sets the listing mode to
!(.list) or !(.nlist) before
applying the sublist options
The 'normal' listing mode .list is the combination of err, loc,
THE ASSEMBLER PAGE 1-18
GENERAL ASSEMBLER DIRECTIVES
bin, eqt, cyc, lin, src, pag, lst, and md enabled with me and
meb disabled. The 'normal' listing mode .nlist has all sublist
items disabled. When specifying sublist options the option list
must be enclosed within parenthesis and multiple options
seperated by commas.
The NOT option, !, is used to set the listing mode to the op-
posite of the .list or .nlist directive before applying the sub-
list options. For example:
.nlist (!) is equivalent to .list and
.list (!) is equivalent to .nlist
any additional options will
be applied normally
Normal .list/.nlist processing is disabled within false con-
ditional blocks. However, the .list/.nlist with an expression
can override this behavior if the expression has a non zero
value.
Examples of listing options:
.list (meb) ; lists macro generated binary
.list (me) ; lists macro expansions
.nlist (src) ; .nlist src lines not listed
.nlist (!,lst) ; list all except .nlist
.nlist ; combination lists only
.list (src) ; the source line
.list (!,src) ; list only the source line
.list 1 ; enable listing even within
; a FALSE conditional block
1.4.5 .page Directive
Format:
.page
The .page directive causes a page ejection with a new heading
to be printed. The new page occurs after the next line of the
source program is processed, this allows an immediately follow-
ing .sbttl directive to appear on the new page. The .page
source line will not appear in the file listing. Paging may be
disabled by invoking the -p directive or by using the directive:
THE ASSEMBLER PAGE 1-19
GENERAL ASSEMBLER DIRECTIVES
.nlist (pag)
If the .page directive is followed by a non zero constant or
an expression that evaluates to a non zero value then pagination
will be enabled within a false condition range to allow extended
textual information to be incorporated in the source program
with out the need to use the comment delimiter (;):
.if 0
.page 1 ;Enable pagination within 'if' block.
This text will be bypassed during assembly
but appear in the listing file.
.
.
.
.endif
1.4.8 .byte, .db, and .fcb Directives
Format:
.byte exp ;Stores the binary value
.db exp ;of the expression in the
.fcb exp ;next byte.
.byte exp1,exp2,expn ;Stores the binary values
.db exp1,exp2,expn ;of the list of expressions
.fcb exp1,exp2,expn ;in successive bytes.
where: exp, represent expressions that will be
exp1, truncated to 8-bits of data.
. Each expression will be calculated,
. the high-order byte will be truncated.
. Multiple expressions must be
expn separated by commas.
The .byte, .db, or .fcb directives are used to generate suc-
cessive bytes of binary data in the object module.
THE ASSEMBLER PAGE 1-21
GENERAL ASSEMBLER DIRECTIVES
1.4.9 .word, .dw, and .fdb Directives
Format:
.word exp ;Stores the binary value
.dw exp ;of the expression in
.fdb exp ;the next word.
.word exp1,exp2,expn ;Stores the binary values
.dw exp1,exp2,expn ;of the list of expressions
.fdb exp1,exp2,expn ;in successive words.
where: exp, represent expressions that will occupy two
exp1, bytes of data. Each expression will be
. calculated as a 16-bit word expression.
. Multiple expressions must be
expn separated by commas.
The .word, .dw, or .fdb directives are used to generate suc-
cessive words of binary data in the object module.
THE ASSEMBLER PAGE 1-22
GENERAL ASSEMBLER DIRECTIVES
1.4.12 .blkb, .ds, .rmb, and .rs Directives
Format:
.blkb N ;reserve N bytes of space
.ds N ;reserve N bytes of space
.rmb N ;reserve N bytes of space
.rs N ;reserve N bytes of space
The .blkb, .ds, .rmb, and .rs directives reserve byte blocks
in the object module;
1.4.13 .blkw, .blk3, and .blk4 Directives
Format:
.blkw N ;reserve N words of space
.blk3 N ;reserve N triples of space
.blk4 N ;reserve N quads of space
The .blkw directive reserves word blocks; the .blk3 reserves
3 byte blocks(available in assemblers supporting 24-bit
addressing); the .blk4 reserves 4 byte blocks (available in as-
semblers supporting 32-bit addressing).
THE ASSEMBLER PAGE 1-23
GENERAL ASSEMBLER DIRECTIVES
1.4.14 .ascii, .str, and .fcc Directives
Format:
.ascii /string/ or
.ascii ^/string/
.fcc /string/ or
.fcc ^/string/
.str /string/ or
.str ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .ascii
directive will give the (q) error.
The .ascii, .fcc, and .str directives place one binary byte of
data for each character in the string into the object module.
1.4.15 .ascis and .strs Directives
Format:
.ascis /string/ or
.ascis ^/string/
.strs /string/ or
.strs ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .ascis
and .strs directives will give the (q) error.
THE ASSEMBLER PAGE 1-24
GENERAL ASSEMBLER DIRECTIVES
The .ascis and .strs directives place one binary byte of data
for each character in the string into the object module. The
last character in the string will have the high order bit set.
1.4.16 .asciz and .strz Directives
Format:
.asciz /string/ or
.asciz ^/string/
.strz /string/ or
.strz ^/string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .asciz
and .strz directive will give the (q) error.
The .asciz and .strz directives place one binary byte of data
for each character in the string into the object module. Fol-
lowing all the character data a zero byte is inserted to ter-
minate the character string.
THE ASSEMBLER PAGE 1-25
GENERAL ASSEMBLER DIRECTIVES
1.4.18 .radix Directive
Format:
.radix character
where: character represents a single character specifying the
default radix to be used for succeeding numbers. The
character may be any one of the following:
B,b Binary
O,o Octal
Q,q
D,d Decimal
'blank'
H,h Hexadecimal
X,x
1.4.19 .even Directive
Format:
.even
The .even directive ensures that the current location counter
contains an even boundary value by adding 1 if the current loca-
tion is odd.
1.4.20 .odd Directive
Format:
.odd
The .odd directive ensures that the current location counter
contains an odd boundary value by adding one if the current lo-
cation is even.
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GENERAL ASSEMBLER DIRECTIVES
1.4.21 .bndry Directive
Format:
.bndry n
If the current location is not an integer multiple of n then
the location counter is increased to the next integer multiple
of n.
As an example:
.bndry 4
changes the current location to be at a multiple of 4, a 4-byte
boundary.
The relocation and/or concatenation of an area containing
.bndry directives to place code at specific boundaries will NOT
maintain the specified boundaries. When relocating such code
areas you must specify the base addresses to the linker manually
and/or you must pad the allocated space of an area to match the
boundary conditions.
As an example suppose you wish to link multiple assembled
code sections, each of which has code for the same area and re-
quires a 4 byte boundary. The starting address of the area must
be specified to the linker on a 4 byte boundary and each as-
sembled code section must be padded to fill out the area in each
of the individually assembled files. The following code will
provide the necessary area padding to allow a succesful linking
of files and maintain the boundary requirements:
.$.end = . ; end of area address
.bndry 4 ; set boundary
.if ne,. - .$.end ; is . the same ?
. = . - 1 ; no: backup 1 byte
.byte 0 ; place padding byte
.endif
If all files are assembled simultaneously then only the
.bndry directive is required at the beginning of the area in
each file and the initial area address must be specified to the
linker.
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GENERAL ASSEMBLER DIRECTIVES
1.4.22 .area Directive
Format:
.area name [(options)]
where: name represents the symbolic name of the program sec-
tion. This name may be the same as any
user-defined symbol as the area names
are independent of all symbols and labels.
options specify the type of program or data area:
ABS absolute (automatically invokes OVR)
REL relocatable
OVR overlay
CON concatenate
NOPAG non-paged area
PAG paged area
The .area directive provides a means of defining and separat-
ing multiple programming and data sections. The name is the
area label used by the assembler and the linker to collect code
from various separately assembled modules into one section. The
name may be from 1 to 79 characters in length.
The options are specified within parenthesis and separated by
commas as shown in the following example:
.area TEST (REL,CON) ;This section is relocatable
;and concatenated with other
;sections of this program area.
.area DATA (REL,OVR) ;This section is relocatable
;and overlays other sections
;of this program area.
.area SYS (ABS,OVR) ;(CON not allowed with ABS)
;This section is defined as
;absolute. Absolute sections
;are always overlayed with
;other sections of this program
;area.
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GENERAL ASSEMBLER DIRECTIVES
.area PAGE (PAG) ;This is a paged section. The
;section must be on a 256 byte
;boundary and its length is
;checked by the linker to be
;no larger than 256 bytes.
;This is useful for direct page
;areas.
The default area type is REL|CON; i.e. a relocatable sec-
tion which is concatenated with other sections of code with the
same area name. The ABS option indicates an absolute area. The
OVR and CON options indicate if program sections of the same
name will overlay each other (start at the same location) or be
concatenated with each other (appended to each other).
Multiple invocations of the .area directive with the same
name must specify the same options or leave the options field
blank, this defaults to the previously specified options for
this program area.
THE ASSEMBLER PAGE 1-29
GENERAL ASSEMBLER DIRECTIVES
The ASxxxx assemblers automatically provide two program
sections:
'_CODE' This is the default code/data area.
This program area is of type (REL,CON).
The ASxxxx assemblers also automatically generate two symbols
for each program area:
's_<area>' This is the starting address of the pro-
gram area.
'l_<area>' This is the length of the program area.
The .area names and options are never case sensitive.
1.4.24 .org Directive
Format:
.org exp
where: exp is an absolute expression that becomes the cur-
rent location counter.
The .org directive is valid only in an absolute program section
and will give a (q) error if used in a relocatable program area.
The .org directive specifies that the current location counter
is to become the specified absolute value.
THE ASSEMBLER PAGE 1-31
GENERAL ASSEMBLER DIRECTIVES
1.4.25 .globl Directive
Format:
.globl sym1,sym2,...,symn
where: sym1, represent legal symbolic names.
sym2,... When multiple symbols are specified,
symn they are separated by commas.
A .globl directive may also have a label field and/or a com-
ment field.
The .globl directive is provided to export (and thus provide
linkage to) symbols not otherwise defined as global symbols
within a module. In exporting global symbols the directive
.globl J is similar to:
J == expression or J::
Because object modules are linked by global symbols, these
symbols are vital to a program. All internal symbols appearing
within a given program must be defined at the end of pass 1 or
they will be considered undefined. The assembly directive (-g)
can be invoked to make all undefined symbols global at the end
of pass 1.
The .globl directive and == construct can be overridden by a
following .local directive.
NOTE
The ASxxxx assemblers use the last occurring symbol
specification in the source file(s) as the type shown
in the symbol table and output to the .rel file.
1.4.26 .local Directive
Format:
.local sym1,sym2,...,symn
where: sym1, represent legal symbolic names.
sym2,... When multiple symbols are specified,
symn they are separated by commas.
A .local directive may also have a label field and/or a com-
ment field.
THE ASSEMBLER PAGE 1-32
GENERAL ASSEMBLER DIRECTIVES
The .local directive is provided to define symbols that are
local to the current assembly process. Local symbols are not
effected by the assembler option -a (make all symbols global).
In defining local symbols the directive .local J is similar to:
J =: expression
The .local directive and the =: construct are useful in de-
fining symbols and constants within a header or definition file
that contains many symbols specific to the current assembly pro-
cess that should not be exported into the .rel output file. A
typical usage is in the definition of SFRs (Special Function
Registers) for a microprocessor.
The .local directive and =: construct can be overridden by a
following .globl directive.
NOTE
The ASxxxx assemblers use the last occurring symbol
specification in the source file(s) as the type shown
in the symbol table and output to the .rel file.
1.4.27 .equ, .gblequ, and .lclequ Directives
Format:
sym1 .equ expr ; equivalent to sym1 = expr
sym2 .gblequ expr ; equivalent to sym2 == expr
sym3 .lclequ expr ; equivalent to sym3 =: expr
or
.equ sym1, expr ; equivalent to sym1 = expr
.gblequ sym2, expr ; equivalent to sym2 == expr
.lclequ sym3, expr ; equivalent to sym3 =: expr
These alternate forms of equivalence are provided for user
convenience.
THE ASSEMBLER PAGE 1-33
GENERAL ASSEMBLER DIRECTIVES
1.4.28 .if, .else, and .endif Directives
Format:
.if expr
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the expres-
sion 'expr' is not zero (i.e. true) and the range of false con-
dition will be processed if the expression 'expr' is zero (i.e
false). The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .if/.else/.endif constructions:
.if A-4 ;evaluate A-4
.byte 1,2 ;insert bytes if A-4 is
.endif ;not zero
.if K+3 ;evaluate K+3
.else
.byte 3,4 ;insert bytes if K+3
.endif ;is zero
.if J&3 ;evaluate J masked by 3
.byte 12 ;insert this byte if J&3
.else ;is not zero
.byte 13 ;insert this byte if J&3
.endif ;is zero
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
THE ASSEMBLER PAGE 1-34
GENERAL ASSEMBLER DIRECTIVES
1.4.29 .iff, .ift, and .iftf Directives
Format:
.if expr ;'if' range Condition is
;TRUE when expr is not zero
.ift ;}
. ;} range of true condition ;}
.iff ;} if
. ;} range of false condition ;} block
.iftf ;}
. ;} unconditional range ;}
.else ;'else' range Condition is
;TRUE when expr is zero
.ift ;}
. ;} range of true condition ;}
.iff ;} else
. ;} range of false condition ;} block
.iftf ;}
. ;} unconditional range ;}
.endif
The subconditional assembly directives may be placed within
conditional assembly blocks to indicate:
1. The assembly of an alternate body of code when
the condition of the block tests false.
2. The assembly of non-contiguous body of code
within the conditional assembly block,
depending upon the result of the conditional
test in entering the block.
3. The unconditional assembly of a body of code
within a conditional assembly block.
The use of the .iff, .ift, and .iftf directives makes the use of
the .else directive redundant.
Note that the implementation of the .else directive causes
the .if tested condition to be complemented. The TRUE and FALSE
conditions are determined by the .if/.else conditional state.
All .if/.else/.endif directives are limited to a maximum
nesting of 10 levels.
The use of the .iff, .ift, or .iftf directives outside of a
conditional block results in a (i) error code.
THE ASSEMBLER PAGE 1-35
GENERAL ASSEMBLER DIRECTIVES
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.30 .ifxx Directives
Additional conditional directives are available to test the
value of an evaluated expression:
.ifne expr ; true if expr != 0
.ifeq expr ; true if expr == 0
.ifgt expr ; true if expr > 0
.iflt expr ; true if expr < 0
.ifge expr ; true if expr >= 0
.ifle expr ; true if expr <= 0
Format:
.ifxx expr
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the expres-
sion 'expr' is not zero (i.e. true) and the range of false con-
dition will be processed if the expression 'expr' is zero (i.e
false). The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .ifxx/.else/.endif constructions:
.ifne A-4 ;evaluate A-4
.byte 1,2 ;insert bytes if A-4 is
.endif ;not zero
.ifeq K+3 ;evaluate K+3
.byte 3,4 ;insert bytes if K+3
.endif ;is zero
.ifne J&3 ;evaluate J masked by 3
.byte 12 ;insert this byte if J&3
.else ;is not zero
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GENERAL ASSEMBLER DIRECTIVES
.byte 13 ;insert this byte if J&3
.endif ;is zero
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.31 .ifdef Directive
Format:
.ifdef sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The range of true condition will be processed if the symbol
'sym' has been defined with a .define directive or 'sym' is a
variable with an assigned value else the false range will be
processed. The range of true condition is optional as is the
.else directive and the range of false condition. The following
are all valid .ifdef/.else/.endif constructions:
.ifdef sym$1 ;lookup symbol sym$1
.byte 1,2 ;insert bytes if sym$1
.endif ;is defined or
;assigned a value
.ifdef sym$2 ;lookup symbol sym$2
.else
.byte 3,4 ;insert bytes if sym$1
.endif ;is not defined and
;not assigned a value
.ifdef sym$3 ;lookup symbol sym$3
.byte 12 ;insert this byte if sym$3
.else ;is defined/valued
.byte 13 ;insert this byte if sym$3
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GENERAL ASSEMBLER DIRECTIVES
.endif ;is not defined/valued
Note that the default assembler configuration of case sensitive
means the testing for a defined symbol is also case sensitive.
All .if/.else/.endif directives are limited to a maximum
nesting of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.32 .ifndef Directive
Format:
.ifndef sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the condition test.
The range of true condition will be processed if the symbol
'sym' is not defined by a .define directive and a variable 'sym'
has not been assigned a value else the range of false condition
will be processed. The range of true condition is optional as
is the .else directive and the range of false condition. The
following are all valid .ifndef/.else/.endif constructions:
.ifndef sym$1 ;lookup symbol sym$1
.byte 1,2 ;insert bytes if sym$1 is
.endif ;not defined and
;not assigned a value
.ifndef sym$2 ;lookup symbol sym$2
.else
.byte 3,4 ;insert bytes if sym$1
.endif ;is defined or
;is assigned a value
.ifndef sym$3 ;lookup symbol sym$3
.byte 12 ;insert this byte if sym$3
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GENERAL ASSEMBLER DIRECTIVES
.else ;is not defined/valued
.byte 13 ;insert this byte if sym$3
.endif ;is defined/valued
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.33 .ifb Directive
Format:
.ifb sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifb is most useful when used in macro de-
finitions to determine if the argument is blank. The range of
true condition will be processed if the symbol 'sym' is blank.
The range of true condition is optional as is the .else direc-
tive and the range of false condition. The following are all
valid .ifb/.else/.endif constructions:
.ifb sym$1 ;argument is not blank
.byte 1,2 ;insert bytes if argument
.endif ;is blank
.ifb sym$2 ;argument is not blank
.else
.byte 3,4 ;insert bytes if argument
.endif ;is not blank
.ifb ;argument is blank
.byte 12 ;insert this byte if
.else ;argument is blank
.byte 13 ;insert this byte if
.endif ;argument not blank
THE ASSEMBLER PAGE 1-39
GENERAL ASSEMBLER DIRECTIVES
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.34 .ifnb Directive
Format:
.ifnb sym
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifnb is most useful when used in macro de-
finitions to determine if the argument is not blank. The range
of true condition will be processed if the symbol 'sym' is not
blank. The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .ifnb/.else/.endif constructions:
.ifnb sym$1 ;argument is not blank
.byte 1,2 ;insert bytes if argument
.endif ;is not blank
.ifnb sym$2 ;argument is not blank
.else
.byte 3,4 ;insert bytes if argument
.endif ;is blank
.ifnb ;argument is blank
.byte 12 ;insert this byte if
.else ;argument is not blank
.byte 13 ;insert this byte if
.endif ;argument is blank
All .if/.else/.endif directives are limited to a maximum nesting
THE ASSEMBLER PAGE 1-40
GENERAL ASSEMBLER DIRECTIVES
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.35 .ifidn Directive
Format:
.ifidn sym$1,sym$2
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifidn is most useful when used in macro de-
finitions to determine if the arguments are identical. The
range of true condition will be processed if the symbol 'sym$1'
is idendical to 'sym$2' (i.e. the character strings for sym$1
and sym$2 are the same consistent with the case sensitivity
flag). When this if statement occurs inside a macro where an
argument substitution may be blank then an argument should be
delimited with the form /symbol/ for each symbol. The range of
true condition is optional as is the .else directive and the
range of false condition. The following are all valid
.ifidn/.else/.endif constructions:
.ifidn sym$1,sym$1 ;arguments are the same
.byte 1,2 ;insert bytes if arguments
.endif ;are the sane
.ifidn sym$1,sym$2 ;arguments are not the same
.else
.byte 3,4 ;insert bytes if arguments
.endif ;are not the same
.ifidn sym$3,sym$3 ;arguments are the same
.byte 12 ;insert this byte if
.else ;arguments are the same
.byte 13 ;insert this byte if
.endif ;arguments are not the same
THE ASSEMBLER PAGE 1-41
GENERAL ASSEMBLER DIRECTIVES
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.36 .ifdif Directive
Format:
.ifdif sym$1,sym$2
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the test condition.
The conditional .ifdif is most useful when used in macro de-
finitions to determine if the arguments are different. The
range of true condition will be processed if the symbol 'sym$1'
is different from 'sym$2' (i.e. the character strings for sym$1
and sym$2 are the not the same consistent with the case sensi-
tivity flag). When this if statement occurs inside a macro
where an argument substitution may be blank then an argument
should be delimited with the form /symbol/ for each symbol. The
range of true condition is optional as is the .else directive
and the range of false condition. The following are all valid
.ifdif/.else/.endif constructions:
.ifdif sym$1,sym$2 ;arguments are different
.byte 1,2 ;insert bytes if arguments
.endif ;are different
.ifdif sym$1,sym$1 ;arguments are identical
.else
.byte 3,4 ;insert bytes if arguments
.endif ;are different
.ifdif sym$1,sym$3 ;arguments are different
.byte 12 ;insert this byte if
.else ;arguments are different
THE ASSEMBLER PAGE 1-42
GENERAL ASSEMBLER DIRECTIVES
.byte 13 ;insert this byte if
.endif ;arguments are identical
All .if/.else/.endif directives are limited to a maximum nesting
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.37 Alternate .if Directive Forms
Format:
.if cnd(,) arg1(, arg2)
where the cnd (followed by an optional comma) may be any of
the following:
-------------------------------------------------------
condition Assemble
(complement) Args Block if:
-------------------------------------------------------
eq ( ne ) expr equal to zero
(not equal to zero)
gt ( le ) expr greater than zero
(less than or equal to zero)
lt ( ge ) expr less than zero
(greater than or equal to zero)
def ( ndef ) symbol .define'd or user set
(not .define'd or user set)
b ( nb ) macro argument present
symbol (argument not present)
idn ( dif ) macro arguments identical
symbol (arguments not identical)
f ( t ) ----- only within a .if/.else/.endif
conditional block
tf ----- only within a .if/.else/.endif
conditional block
All .if/.else/.endif directives are limited to a maximum nesting
THE ASSEMBLER PAGE 1-43
GENERAL ASSEMBLER DIRECTIVES
of 10 levels.
The use of a .else directive outside a .if/.endif block will
generate an (i) error. Assemblies having unequal .if and .endif
counts will cause an (i) error.
1.4.38 Immediate Conditional Assembly Directives
The immediate conditional assembly directives allow a single
line of code to be assembled without using a .if/.else/.endif
construct. All of the previously described conditionals have
immediate equivalents.
Format:
.iif arg(,) line_to_assemble
.iifeq arg(,) line_to_assemble
.iifne arg(,) line_to_assemble
.iifgt arg(,) line_to_assemble
.iifle arg(,) line_to_assemble
.iifge arg(,) line_to_assemble
.iiflt arg(,) line_to_assemble
.iifdef arg(,) line_to_assemble
.iifndef arg(,) line_to_assemble
.iifb (,)arg(,) line_to_assemble
.iifnb (,)arg(,) line_to_assemble
.iifidn (,)arg1,arg2(,) line_to_assemble
.iifdif (,)arg1,arg2(,) line_to_assemble
.iiff line_to_assemble
.iift line_to_assemble
.iiftf line_to_assemble
Alternate Format:
.iif arg(,) line_to_assemble
.iif eq arg(,) line_to_assemble
.iif ne arg(,) line_to_assemble
.iif gt arg(,) line_to_assemble
.iif le arg(,) line_to_assemble
.iif ge arg(,) line_to_assemble
.iif lt arg(,) line_to_assemble
.iif def arg(,) line_to_assemble
.iif ndef arg(,) line_to_assemble
.iif b (,)arg(,) line_to_assemble
.iif nb (,)arg(,) line_to_assemble
.iif idn (,)arg1,arg2(,) line_to_assemble
THE ASSEMBLER PAGE 1-44
GENERAL ASSEMBLER DIRECTIVES
.iif dif (,)arg1,arg2(,) line_to_assemble
.iiff line_to_assemble
.iift line_to_assemble
.iiftf line_to_assemble
The (,) indicates an optional comma.
The .iif types b, n, idn, and dif require the commas if the
argument(s) may be blank. These commas may be removed if the
arguments are delimited with the form ^/symbol/ for each symbol.
The immediate conditional directives donot change the
.if/.else/.endif nesting level.
1.4.39 .include Directive
Format:
.include /string/ or
.include ^/string/
where: string represents a string that is the file specifica-
tion of an ASxxxx source file.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .include
directive will give the (q) error.
The .include directive is used to insert a source file within
the source file currently being assembled. When this directive
is encountered, an implicit .page directive is issued. When the
end of the specified source file is reached, an implicit .page
directive is issued and input continues from the previous source
file. The maximum nesting level of source files specified by a
.include directive is five.
The total number of separately specified .include files is
unlimited as each .include file is opened and then closed during
each pass made by the assembler.
The default directory path, if none is specified, for any
.include file is the directory path of the current file. For
example: if the current source file, D:\proj\file1.asm,
THE ASSEMBLER PAGE 1-45
GENERAL ASSEMBLER DIRECTIVES
includes a file specified as "include1" then the file
D:\proj\include1.asm is opened.
THE ASSEMBLER PAGE 1-46
GENERAL ASSEMBLER DIRECTIVES
1.4.41 .setdp Directive
Format:
.setdp [base [,area]]
The set direct page directive has a common format in all the as-
semblers supporting a paged mode. The .setdp directive is used
to inform the assembler of the current direct page region and
the offset address within the selected area. The normal invoca-
tion methods are:
.area DIRECT (PAG)
.setdp
or
.setdp 0,DIRECT
for all the 68xx microprocessors (the 6804 has only the paged
ram area). The commands specify that the direct page is in area
DIRECT and its offset address is 0 (the only valid value for all
but the 6809 microprocessor). Be sure to place the DIRECT area
at address 0 during linking. When the base address and area are
not specified, then zero and the current area are the defaults.
If a .setdp directive is not issued the assembler defaults the
direct page to the area "_CODE" at offset 0.
The assembler verifies that any local variable used in a
direct variable reference is located in this area. Local vari-
able and constant value direct access addresses are checked to
be within the address range from 0 to 255.
External direct references are assumed by the assembler to be
in the correct area and have valid offsets. The linker will
check all direct page relocations to verify that they are within
the correct area.
The 6809 microprocessor allows the selection of the direct
page to be on any 256 byte boundary by loading the appropriate
value into the dp register. Typically one would like to select
the page boundary at link time, one method follows:
THE ASSEMBLER PAGE 1-47
GENERAL ASSEMBLER DIRECTIVES
.area DIRECT (PAG) ; define the direct page
.setdp
.
.
.
.area PROGRAM
.
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
At link time specify the base and global equates to locate the
direct page:
-b DIRECT = 0x1000
-g DIRECT = 0x1000
Both the area address and offset value must be specified (area
and variable names are independent). The linker will verify
that the relocated direct page accesses are within the direct
page.
The preceeding sequence could be repeated for multiple paged
areas, however an alternate method is to define a non-paged area
and use the .setdp directive to specify the offset value:
.area DIRECT ; define non-paged area
.
.
.
.area PROGRAM
.
.setdp 0,DIRECT ; direct page area
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
.
.
.setdp 0x100,DIRECT ; direct page area
ldd #DIRECT+0x100 ; load the direct page register
tfr a,dp ; for access to the direct page
The linker will verify that subsequent direct page references
are in the specified area and offset address range. It is the
programmers responsibility to load the dp register with the cor-
rect page segment corresponding to the .setdp base address
specified.
For those cases where a single piece of code must access a
defined data structure within a direct page and there are many
pages, define a dumby direct page linked at address 0. This
dumby page is used only to define the variable labels. Then
load the dp register with the real base address but donot use a
.setdp directive. This method is equivalent to indexed
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GENERAL ASSEMBLER DIRECTIVES
addressing, where the dp register is the index register and the
direct addressing is the offset.
1.4.42 .16bit, .24bit, and .32bit Directives
Format:
.16bit ;specify 16-bit addressing
.24bit ;specify 24-bit addressing
.32bit ;specify 32-bit addressing
The .16bit, .24bit, and .32bit directives are special direc-
tives for assembler configuration when default values are not
used.
1.5 INVOKING ASXXXX
Starting an ASxxxx assembler without any arguments provides
the following option list and then exits:
Usage: [-Options] file
Usage: [-Options] outfile file1 [file2 file3 ...]
-d Decimal listing
-q Octal listing
-x Hex listing (default)
-g Undefined symbols made global
-a All user symbols made global
-b Display .define substitutions in listing
-bb and display without .define substitutions
-c Disable instruction cycle count in listing
-j Enable NoICE Debug Symbols
-y Enable SDCC Debug Symbols
-l Create list output (out)file[.lst]
-o Create object output (out)file[.rel]
-s Create symbol output (out)file[.sym]
-p Disable listing pagination
-u Disable .list/.nlist processing
-w Wide listing format for symbol table
-z Disable case sensitivity for symbols
-f Flag relocatable references by ` in listing file
-ff Flag relocatable references by mode in listing file
The ASxxxx assemblers are command line oriented. Most sytems
require the option(s) and file(s) arguments to follow the ASxxxx
assembler name:
as6809 -[Options] file
as6809 [-Options] outfile file1 [file2 ...]
Some systems may request the arguments after the assembler is
started at a system specific prompt:
as6809
argv: -[Options] file
as6809
argv: [-Options] outfile file1 [file2 ...]
The ASxxxx options in some more detail:
-d decimal listing
THE ASSEMBLER PAGE 1-51
INVOKING ASXXXX
-q octal listing
-x hex listing (default)
The listing radix affects the
.lst, .rel, and .sym files.
-g undefined symbols made global
Unresolved (external) variables
and symbols are flagged as global.
-a all user symbols made global
All defined (not local or external)
variables and symbols are flagged
as global.
-b display .define substitutions in listing
If a .define substitution has been applied
to an assembler source line the source
line is printed with the substitution.
-bb and display without .define substitutions
If a .define substitution has been applied
to an assembler source line the source
line is first printed without substitution
followed by the line with the substitution.
-c Disable instruction cycle count in listing
This option overrides the listing option
'cyc' in the .list and .nlist directives.
Instruction cycle counts cannot be enabled
if the -c option is specified.
-j enable NOICE debug symbols
-y enable SDCC debug symbols
-l create list output (out)file.lst
If -s (symbol table output) is not
specified the symbol table is included
at the end of the listing file.
-o create object output (out)file.rel
-s create symbol output (out)file.sym
-p disable listing pagination
This option inhibits the generation
THE ASSEMBLER PAGE 1-52
INVOKING ASXXXX
of a form-feed character and its
associated page header in the
assembler listing.
-u disable .list/.nlist processing
This option disables all .list and
.nlist directives. The listing mode
is .list with the options err, loc,
bin, eqt, cyc, lin, src, pag, lst,
and md. The options cyc and pag are
overridden by the -c and -p command
line options.
-w wide listing format for symbol table
-z disable case sensitivity for symbols
-f by ` in the listing file
-ff by mode in the listing file
Relocatable modess are flagged by byte
position (LSB, Byte 2, Byte 3, MSB)
*nMN paged,
uvUV unsigned,
rsRS signed,
pqPQ program counter relative.
asx8051 specific command line option:
-I<dir> Add the named directory to the include file
search path. This option may be used more than once.
Directories are searched in the order given.
The file name for the .lst, .rel, and .sym files is the first
file name specified in the command line. All output files are
ascii text files which may be edited, copied, etc. The output
files are the concatenation of all the input files, if files are
to be assembled independently invoke the assembler for each
file.
The .rel file contains a radix directive so that the linker
will use the proper conversion for this file. Linked files may
have different radices.
ASXXXX assemblers supported by and distributed with SDCC are:
sdas390 (Dallas 80390)
sdas6808 (Motorola 68HC08)
sdas8051 (Intel 8051)
sdasgb (GameBoy Z80-like CPU)
sdasrab (Rabbit Z80-like CPU)
sdasz80 (Zilog Z80 / Hitachi HD64180)
1.6 ERRORS
The ASxxxx assemblers provide limited diagnostic error codes
during the assembly process, these errors will be noted in the
listing file and printed on the stderr device.
The assembler reports the errors on the stderr device as
?ASxxxx-Error-<*> in line nnn of filename
where * is the error code, nnn is the line number, and filename
THE ASSEMBLER PAGE 1-53
ERRORS
is the source/include file.
The errors are:
(.) This error is caused by an absolute direct assign-
ment of the current location counter
. = expression (incorrect)
rather than the correct
. = . + expression
(a) Indicates a machine specific addressing or address-
ing mode error.
(b) Indicates a direct page boundary error.
(d) Indicates a direct page addressing error.
(i) Caused by an .include file error or an .if/.endif
mismatch.
(m) Multiple definitions of the same label, multiple
.module directives, multiple conflicting attributes
in an .area directive.
(n) An .mexit, .endm, or .narg directive outside of a
macro, repeat block or indefinite repeat block.
(o) Directive or mnemonic error or the use of the .org
directive in a relocatable area.
(p) Phase error: label location changing between passes
2 and 3. Normally caused by having more than one
level of forward referencing.
(q) Questionable syntax: missing or improper operators,
terminators, or delimiters.
(r) Relocation error: logic operation attempted on a
relocatable term, addition of two relocatable terms,
subtraction of two relocatable terms not within the
same programming area or external symbols.
(s) String Substitution / recursion error.
(u) Undefined symbol encountered during assembly.
(z) Divide by 0 or Modulus by 0 error: result is 0.
THE ASSEMBLER PAGE 1-54
LISTING FILE
1.7 LISTING FILE
The (-l) option produces an ascii output listing file. Each
page of output contains a five line header:
1. The ASxxxx program name and page number
2. Assembler Radix and Address Bits
3. Title from a .title directive (if any)
4. Subtitle from a .sbttl directive (if any)
5. Blank line
Each succeeding line contains six fields:
1. Error field (first two characters of line)
2. Current location counter
3. Generated code in byte format
4. Opcode cycles count
5. Source text line number
6. Source text
The error field may contain upto 2 error flags indicating any
errors encountered while assembling this line of source code.
The current location counter field displays the 16-bit,
24-bit, or 32-bit program position. This field will be in the
selected radix.
The generated code follows the program location. The listing
radix determines the number of bytes that will be displayed in
this field. Hexadecimal listing allows six bytes of data within
the field, decimal and octal allow four bytes within the field.
If more than one field of data is generated from the assembly of
a single line of source code, then the data field is repeated on
successive lines.
The opcode cycles count is printed within the delimiters [ ]
on the line with the source text. This reduces the number of
THE ASSEMBLER PAGE 1-55
LISTING FILE
generated code bytes displayed on the line with the source list-
ing by one. (The -c option disables all opcode cycle listing.)
The source text line number is printed in decimal and is fol-
lowed by the source text. A Source line with a .page directive
is never listed. (The -u option overrides this behavior.)
Two additional options are available for printing the source
line text. If the -b option is specified then the listed source
line contains all the .define substitutions. If the -bb option
is specified then the original source line is printed before the
source line with substitutions.
Two data field options are available to flag those bytes
which will be relocated by the linker. If the -f option is
specified then each byte to be relocated will be preceeded by
the '`' character. If the -ff option is specified then each
byte to be relocated will be preceeded by one of the following
characters:
1. * paged relocation
2. u low byte of unsigned word or unsigned byte
3. v high byte of unsigned word
4. p PCR low byte of word relocation or PCR byte
5. q PCR high byte of word relocation
6. r low byte relocation or byte relocation
7. s high byte relocation
Assemblers which use 24-bit or 32-bit addressing use an ex-
tended flagging mode:
1. * paged relocation
2. u 1st byte of unsigned value
3. v 2nd byte of unsigned value
4. U 3rd byte of unsigned value
5. V 4th byte of unsigned value
6. p PCR 1st byte of relocation value or PCR byte
7. q PCR 2nd byte of relocation value
THE ASSEMBLER PAGE 1-56
LISTING FILE
8. P PCR 3rd byte of relocation value
9. Q PCR 4th byte of relocation value
10. r 1st byte of relocation value or byte relocation
11. s 2nd byte of relocation value
12. R 3rd byte of relocation value
13. S 4th byte of relocation value
1.8 SYMBOL TABLE FILE
The symbol table has two parts:
1. The alphabetically sorted list of symbols and/or labels
defined or referenced in the source program.
2. A list of the program areas defined during assembly of
the source program.
The sorted list of symbols and/or labels contains the follow-
ing information:
1. Program area number (none if absolute value or exter-
nal)
2. The symbol or label
3. Directly assigned symbol is denoted with an (=) sign
4. The value of a symbol, location of a label relative to
the program area base address (=0), or a **** indicat-
ing the symbol or label is undefined.
5. The characters: G - global, L - local,
R - relocatable, and X - external.
The list of program areas provides the correspondence between
the program area numbers and the defined program areas, the size
of the program areas, and the area flags (attributes).
THE ASSEMBLER PAGE 1-57
OBJECT FILE
1.9 OBJECT FILE
The object file is an ascii file containing the information
needed by the linker to bind multiple object modules into a com-
plete loadable memory image. The object module contains the
following designators:
[XDQ][HL][234]
X Hexadecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
2 16-Bit Addressing
3 24-Bit Addressing
4 32-Bit Addressing
H Header
M Module
A Area
S Symbol
T Object code
R Relocation information
P Paging information
Refer to the linker for a detailed description of each of the
designators and the format of the information contained in the
object file.
CHAPTER 2
THE MACRO PROCESSOR
2.1 DEFINING MACROS
By using macros a programmer can use a single line to insert
a sequence of lines into a source program.
A macro definition is headed by a .macro directive followed
by the source lines. The source lines may optionally contain
dummy arguments. If such arguments are used, each one is listed
in the .macro directive.
A macro call is the statement used by the programmer to call
the macro source program. It consists of the macro name fol-
lowed by the real arguments needed to replace the dummy argu-
ments used in the macro.
Macro expansion is the insertion of the macro source lines
into the main program. Included in this insertion is the
replacement of the dummy arguments by the real arguments.
Macro directives provide a means to manipulate the macro ex-
pansions. Only one directive is allowed per source line. Each
directive may have a blank operand field or one or more
operands. Legal operands differ with each directive. The
macros and their associated directives are detailed in this
chapter.
Macro directives can replace any machine dependent mnemonic
associated with a specific assembler. However, the basic assem-
bler directives cannot be replaced with a macro.
THE MACRO PROCESSOR PAGE 2-2
DEFINING MACROS
2.1.1 .macro Directive
Format:
[label:] .macro name, dummy argument list
where: label represents an optional statement label.
name represents the user-assigned symbolic
name of the macro. This name may be
any legal symbol and may be used as a
label elsewhere in the program. The
macro name is not case sensitive,
name, NAME, or nAmE all refer to the
same macro.
, represents a legal macro separator
(comma, space, and/or tab).
dummy represents a number of legal symbols
argument that may appear anywhere in the body of
list the macro definition, even as a label.
These dummy symbols can be used elsewhere
in the program with no conflict of
definition. Multiple dummy arguments
specified in this directive may be
separated by any legal separator. The
detection of a duplicate or an illegal
symbol in a dummy argument list
terminates the scan and causes a 'q'
error to be generated.
A comment may follow the dummy argument list in a .macro direc-
tive, as shown below:
.macro abs a,b ;Defines macro abs
The first statement of a macro definition must be a .macro
directive. Defining a macro with the same name as an existing
macro will generate an 'm' error. The .mdelete directive should
be used to delete the previous macro definition before redefin-
ing a macro.
THE MACRO PROCESSOR PAGE 2-3
DEFINING MACROS
2.1.2 .endm Directive
Format:
.endm
The .endm directive should not have a label. Because the direc-
tives .irp, .irpc, and .rept may repeat more than once the label
will be defined multiple times resulting in 'm' and/or 'p' er-
rors.
The .endm directive may be followed by a comment field, as
shown below:
.endm ;end of macro
A comment may follow the dummy argument list in a .macro
directive, as shown below:
.macro typemsg message ;Type a message.
jsr typemsg
.word message
.endm ;End of typemsg
The final statement of every macro definition must be a .endm
directive. The .endm directive is also used to terminate inde-
finite repeat blocks and repeat blocks. A .endm directive en-
countered outside a macro definition is flagged with an 'n'
error.
2.1.3 .mexit Directive
Format:
.mexit
The .mexit directive may be used to terminate a macro expansion
before the end of the macro is encountered. This directive is
also legal within repeat blocks. It is most useful in nested
macros. The .mexit directive terminates the current macro as
though a .endm directive had been encountered. Using the .mexit
directive bypasses the complexities of nested conditional direc-
tives and alternate assembly paths, as shown in the following
example:
THE MACRO PROCESSOR PAGE 2-4
DEFINING MACROS
.macro altr N,A,B
.
.
.
.if eq,N ;Start conditional Block
.
.
.
.mexit ;Terminate macro expansion
.endif ;End of conditional block
.
.
.
.endm ;Normal end of macro
In an assembly where the symbol N is replaced by zero, the
.mexit directive would assemble the conditional block and ter-
minate the macro expansion. When macros ar nested, a .mexit
directive causes an exit to the next higher level of macro ex-
pansion. A .mexit directive encountered outside a macro defini-
tion is flagged with an 'n' error.
2.2 CALLING MACROS
Format:
[label:] name real arguments
where: label represents an optional statement label.
name represents the name of the macro, as
specified in the macro definition.
real represent symbolic arguments which
arguments replace the dummy arguments listed
in the .macro definition. When
multiple arguments occur, they are
separated by any legal separator.
Arguments to the macro call are
treated as character strings, their
usage is determined by the macro
definition.
A macro definition must be established by means of the .macro
directive before the macro can be called and expanded within the
source program.
When a macro name is the same as a user label, the appearance
of the symbol in the operator field designates the symbol as a
THE MACRO PROCESSOR PAGE 2-5
CALLING MACROS
macro call; the appearance of the symbol in the operand field
designates it as a label, as shown below:
LESS: mov @r0,r1 ;LESS is a label
.
.
.
bra LESS ;LESS is considered a label
.
.
.
LESS sym1,sym2 ;LESS is a macro call
2.3 ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
Multiple arguments within a macro must be separated by one of
the legal separating characters (comma, space, and/or tab).
Macro definition arguments (dummy) and macro call arguments
(real) maintain a strict positional relationship. That is, the
first real argument in a macro call corresponds with the first
dummy argument in the macro definition.
For example, the following macro definition and its asso-
ciated macro call contain multiple arguments:
.macro new a,b,c
.
.
.
new phi,sig,^/C1,C2/
Arguments which themselves contain separating characters must be
enclosed within the delimiter construct ^/ / where the
character '/' may be any character not in the argument string.
For example, the macro call:
new ^/exg x,y/,#44,ij
causes the entire expression
exg x,y
to replace all occurrances of the symbol a in the macro defini-
tion. Real arguments with a macro call are considered to be
character strings and are treated as a single entity during
macro expansion.
THE MACRO PROCESSOR PAGE 2-6
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
The up-arrow (^) construction also allows another up-arrow
costruction to be passed as part of the argument. This con-
struction, for example, could have been used in the above macro
call, as follows:
new ^!^/exg x,y/!,#44,ij
causing the entire string ^/exg x,y/ to be passed as an argu-
ment.
2.3.1 Macro Nesting
Macro nesting occurs where the expansion of one macro in-
cludes a call to another macro. The depth of nesting is arbi-
trarily limited to 20.
To pass an argument containing legal argument delimiters to
nested macros, enclose the argument in the macro definition
within an up-arrow construction, as shown in the coding example
below. This extra set of delimiters for each level of nesting
is required in the macro definition, not the in the macro call.
.macro level1 dum1,dum2
level2 ^/dum1/
level2 ^/dum2/
.endm
.macro level2 dum3
dum3
add #10,z
push z
.endm
A call to the level1 macro, as shown below, for example:
level1 ^/leaz 0,x/,^/tfr x,z/
causes the following macro expansion to occur:
leaz 0,x
add #10,z
push z
tfr x,z
add #10,z
push z
When macro definitions are nested, the inner definition cannot
be called until the outer macro has been called and expanded.
For example, in the following code:
THE MACRO PROCESSOR PAGE 2-7
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
.macro lv1 a,b
.
.
.
.macro lv2 c
.
.
.
.endm
.endm
the lv2 macro cannot be called and expanded until the lv1 macro
has been expanded. Likewise, any macro defined within the lv2
macro definition cannot be called and expanded until lv2 has
also been expanded.
2.3.2 Special Characters in Macro Arguments
If an argument does not contain spaces, tabs, or commas it
may include special characters without enclosing them in a
delimited construction. For example:
.macro push arg
mov arg,-(sp)
.endm
push x+3(%2)
causes the following code to be generated:
mov x+3(%2),-(sp)
2.3.3 Passing Numerical Arguments as Symbols
If the unary operator backslash (\) precedes an argument, the
macro treats the argument as a numeric value in the current pro-
gram radix. The ascii characters representing this value are
inserted in the macro expansion, and their function is defined
in the context of the resulting code, as shown in the following
example:
THE MACRO PROCESSOR PAGE 2-8
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
.macro inc a,b
con a,\b
b = b + 1
.endm
.macro con a,b
a'b: .word 4
.endm
...
c = 0 ;Initialize
inc x,c
The above macro call (inc) would thus expand to:
x0: .word 4
In this expanded code, the lable x0: results from the con-
catenation of two real arguments. The single quote (')
character in the label a'b: concatenates the real argument x
and 0 as they are passed during the expansion of the macro.
This type of argument construction is descibed in more detail in
a following section.
A subsequent call to the same macro would generate the fol-
lowing code:
x1: .word 4
and so on, for later calls. The two macro definitions are
necessary because the symbol associated with the dummy argument
b (that is, symbol c) cannot be updated in the con macro defini-
tion, because the character 0 has replaced c in the argument
string (inc x,c). In the con macro definition, the number
passed is treated as a string argument. (Where the value of the
real argument is 0, only a single 0 character is passed to the
macro expansion.
THE MACRO PROCESSOR PAGE 2-9
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
2.3.4 Number of Arguments in Macro Calls
A macro can be defined with or without arguments. If more
arguments appear in the macro call than in the macro definition,
a 'q' error is generated. If fewer arguments appear in the
macro call than in the macro definition, missing arguments are
assumed to be null values. The conditional directives .if b and
.if nb can be used within the macro to detect missing arguments.
The number of arguments can be determined using the .narg direc-
tive.
2.3.5 Creating Local Symbols Automatically
A label is often required in an expanded macro. In the con-
ventional macro facilituies thus far described, a label must be
explicitly specified as an argument with each macro call. The
user must be careful in issuing subsequent calls to the same
macro in order avoid duplicating labels. This concern can be
eliminated through a feature of the ASxxxx macro facility that
creates a unique symbol where a label is required in an expanded
macro.
ASxxxx allows temporary symbols of the form n$, where n is a
decimal integer. Automatically created symbols are created in
numerical order beginning at 10000$.
The automatic generation of local symbols is invoked on each
call of a macro whose definition contains a dummy argument pre-
ceded by the question mark (?) character, as shown in the macro
definition below:
.macro beta a,?b ;dummy argument b with ?
tst a
beq b
add #5,a
b:
.endm
A local symbol is created automatically only when a real ar-
gument of the macro call is either null or missing, as shown in
Example 1 below. If the real argument is specified in the macro
call, however, generation of the local symbol is inhibited and
normal argument replacement occurs, as shown in Example 2 below.
(Examples 1 and 2 are both expansions of the beta macro defined
above.)
THE MACRO PROCESSOR PAGE 2-10
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
Example 1: Create a Local Symbol for the Missing Argument
beta flag ;Second argument is missing.
tst flag
beq 10000$ ;Local symbol is created.
add #5,flag
10000$:
Example 2: Do Not Create a Local Symbol
beta r3,xyz
tst r3
beq xyz
add #5,r3
xyz:
Automatically created local symbols resulting from the expan-
sion of a macro, as described above, do not establish a local
symbol block in their own right.
When a macro has several arguments earmarked for automatic
local symbol generation, substituting a specific label for one
such argument risks assembly errors because the arguments are
constructed at the point of macro invocation. Therefor, the ap-
pearance of a label in the macro expansion will create a new lo-
cal symbol block. The new local symbol block could leave local
symbol references in the previous block and their symbol defini-
tions in the new one, causing error codes in the assembly list-
ing. Furthermore a later macro expansion that creates local
symbols in the new block may duplicate one of the symbols in
question, causing an additional error code 'p' in the assembly
listing.
2.3.6 Concatenation of Macro Arguments
The apostrophe or single quote character (') operates as a
legal delimiting character in macro definitions. A single quote
that precedes and/or follows a dummy argument in a macro defini-
tion is removed, and the substitution of the real argument oc-
curs at that point. For example, in the following statements:
.macro def A,B,C
A'B: asciz "C"
.byte ''A,''B
.endm
when the macro def is called through the statement:
THE MACRO PROCESSOR PAGE 2-11
ARGUMENTS IN MACRO DEFINITIONS AND MACRO CALLS
def x,y,^/V05.00/
it is expanded, as follows:
xy: asciz "V05.00"
.byte 'x,'y
In expanding the first line, the scan for the first argument
terminates upon finding the first apostrophe (') character.
Since A is a dummy argument, the apostrphe (') is removed. The
scan then resumes with B; B is also noted as another dummy ar-
gument. The two real arguments x and y are then concated to
form the label xy:. The third dummy argument is noted in the
operand field of the .asciz directive, causing the real argument
V05.00 to be substituted in this field.
When evaluating the arguments of the .byte directive during
expansion of the second line, the scan begins with the first
apostrophe (') character. Since it is neither preceded nor fol-
lowed by a dummy argument, this apostrophe remains in the macro
expansion. The scan then encounters the second apostrophe,
which is followed by a dummy argument and is therefor discarded.
The scan of argument A is terminated upon encountering the comma
(,). The third apostrophe is neither preceded nor followed by a
dummy argument and again remains in the macro expansion. The
fourth (and last) apostrophe is followed by another dummy argu-
ment and is likewise discarded. (Four apostrophe (') characters
were necessary in the macro definition to generate two apos-
trophe (') characters in the macro expansion.)
2.4 MACRO ATTRIBUTE DIRECTIVES
The ASxxxx assemblers have four directives that allow the
user to determine certain attributes of macro arguments: .narg,
.nchr, .ntyp, and .nval. The use of these directives permits
selective modifications of a macro expansion, depending on the
nature of the arguments being passed. These directives are
described below.
THE MACRO PROCESSOR PAGE 2-12
MACRO ATTRIBUTE DIRECTIVES
2.4.1 .narg Directive
Format:
[label:] .narg symbol
where: label represents an optional statement label.
symbol represents any legal symbol. This symbol
is equated to the number of arguments in
the macro call currently being expanded.
If a symbol is not specified, the .narg
directive is flagged with a 'q' error.
The .narg directive is used to determine the number of arguments
in the macro call currently being expanded. Hence, the .narg
directive can appear only within a macro definition; if it ap-
pears elsewhere, an 'n' error is generated.
The argument count includes null arguments as shown in the
following:
.macro pack A,B,C
.narg cnt
.
.
.
.endm
pack arg1,,arg3
pack arg1
When the first macro pack is invoked .narg will assign a value
of three (3) to the number of arguments cnt, which includes the
empty argument. The second invocation of macro pack has only a
single argument specified and .narg will assign a value of one
(1) to cnt.
THE MACRO PROCESSOR PAGE 2-13
MACRO ATTRIBUTE DIRECTIVES
2.4.2 .nchr Directive
Format:
[label:] .nchr symbol,string
where: label represents an optional statement label.
symbol represents any legal symbol. This symbol
is equated to the number of characters in
the string of the macro call currently
being expanded. If a symbol is not
specified, the .nchr directive is
flagged with a 'q' error.
, represents any legal separator (comma,
space, and/or tab).
string represents a string of printable 7-bit
ascii characters. If the character
string contains a legal separator
(comma, space and/or tab) the whole
string must be delimited using the
up-arrow (^) construct ^/ /.
If the delimiting characters do not
match or if the ending delimiter
cannot be detected because of a
syntactical error in the character
string, the .nchr directive reports
a 'q' error.
The .nchr directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the number of characters in a speci-
fied character string. This directive is useful in calculating
the length of macro arguments.
THE MACRO PROCESSOR PAGE 2-14
MACRO ATTRIBUTE DIRECTIVES
2.4.3 .ntyp Directive
Format:
[label:] .ntyp symbol,arg
where: label represents an optional statement label.
symbol represents any legal symbol. The symbol
is made absolute and equated to 0 if
arg is an absolute value or a non
relocatable symbol. The symbol is made
absolute and equated to 1 if arg is a
relocatable symbol. If a symbol is not
specified then the .ntyp directive is
flagged with a 'q' error.
, represents any legal separator (comma,
space, and/or tab).
arg represents any legal expression or
symbol. If arg is not specified
then the .ntyp directive is flagged
with a 'q' error.
The .ntyp directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the symbol or expression type as ab-
solute (0) or relocatable (1).
2.4.4 .nval Directive
Format:
[label:] .nval symbol,arg
where: label represents an optional statement label.
symbol represents any legal symbol. The symbol
is equated to the value of arg and made
absolute. If a symbol is not specified
then the .nval directive is flagged
with a 'q' error.
, represents any legal separator (comma,
space, and/or tab).
arg represents any legal expression or
symbol. If arg is not specified
then the .nval directive is flagged
THE MACRO PROCESSOR PAGE 2-15
MACRO ATTRIBUTE DIRECTIVES
with a 'q' error.
The .nval directive, which can appear anywhere in an ASxxxx pro-
gram, is used to determine the value of arg and make the result
an absolute value.
2.5 INDEFINITE REPEAT BLOCK DIRECTIVES
An indefinite repeat block is similar to a macro definition
with only one dummy argument. At each expansion of the inde-
finite repeat range, this dummy argument is replaced with suc-
cessive elements of a real argument list. Since the repeat
directive and its associated range are coded in-line within the
source program, this type of macro definition and expansion does
not require calling the macro by name, as required in the expan-
sion of the conventional macros previously described.
An indefinite repeat block can appear within or outside
another macro definition, indefinite repeat block, or repeat
block. The rules specifying indefinite repeat block arguments
are the same as for specifying macro arguments.
THE MACRO PROCESSOR PAGE 2-16
INDEFINITE REPEAT BLOCK DIRECTIVES
2.5.1 .irp Directive
Format:
[label:] .irp sym,argument_list
.
.
(range of indefinite repeat block)
.
.
.endm
where: label represents an optional statement label.
sym represents a dummy argument that is
replaced with successive real arguments
from the argument list. If the dummy
argument is not specified, the .irp
directive is flagged with a 'q' error.
, represents any legal separator (comma,
space, and/or tab).
argument_list represents a list of real arguments
that are to be used in the expansion
of the indefinite repeat range. A real
argument may consist of one or more
7-bit ascii characters; multiple
arguments must be separated by any
legal separator (comma, space, and/or
tab). If an argument must contain
a legal separator then the up-arrow
(_^) construct is require for that
argument. If no real arguments are
specified, no action is taken.
range represents the block of code to be
repeated once for each occurrence of
a real argument in the list. The
range may contain other macro
definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the indefinite
repeat block range.
The .irp directive is used to replace a dummy argument with suc-
cessive real arguments specified in an argument list. This
replacement process occurrs during the expansion of an inde-
finite repeat block range.
THE MACRO PROCESSOR PAGE 2-17
INDEFINITE REPEAT BLOCK DIRECTIVES
2.5.2 .irpc Directive
Format:
[label:] .irpc sym,string
.
.
(range of indefinite repeat block)
.
.
.endm
where: label represents an optional statement label.
sym represents a dummy argument that is
replaced with successive real characters
from the argument string. If the dummy
argument is not specified, the .irpc
directive is flagged with a 'q' error.
, represents any legal separator (comma,
space, and/or tab).
string represents a list of 7-bit ascii
characters. If the string contains
legal separator characters (comma,
space, and/or tab) then the up-arrow
(_^) construct must delimit the string.
range represents the block of code to be
repeated once for each occurrence of
a real argument in the list. The
range may contain other macro
definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the indefinite
repeat block range.
The .irpc directive is available to permit single character sub-
stition. On each iteration of the indefinite repeat range, the
dummy argument is replaced with successive characters in the
specified string.
THE MACRO PROCESSOR PAGE 2-18
INDEFINITE REPEAT BLOCK DIRECTIVES
2.6 REPEAT BLOCK DIRECTIVE
A repeat block is similar to a macro definition with only one
argument. The argument specifies the number of times the repeat
block is inserted into the assembly stream. Since the repeat
directive and its associated range are coded in-line within the
source program, this type of macro definition and expansion does
not require calling the macro by name, as required in the expan-
sion of the conventional macros previously described.
A repeat block can appear within or outside another macro de-
finition, indefinite repeat block, or repeat block.
2.6.1 .rept
Format:
[label:] .rept exp
.
.
(range of repeat block)
.
.
.endm
where: label represents an optional statement label.
exp represents any legal expression.
This value controls the number of
times the block of code is to be assembled
within the program. When the expression
value is less than or equal to zero (0),
the repeat block is not assembled. If
this value is not an absolute value, the
.rept directive is flagged with an 'r'
error.
range represents the block of code to be
repeated. The range may contain other
macro definitions, repeat ranges and/or
the .mexit directive.
.endm indicates the end of the repeat block
range.
The .rept directive is used to duplicate a block of code, a cer-
tain number of times, in line with other source code.
THE MACRO PROCESSOR PAGE 2-19
REPEAT BLOCK DIRECTIVE
2.7 MACRO DELETION DIRECTIVE
The .mdelete directive deletes the definitions of the the
specified macro(s).
2.7.1 .mdelete
Format:
.mdelete name1,name2,...,namen
where: name1, represent legal macro names. When multiple
name2, names are specified, they are separated
..., by any legal separator (comma, space, and/or
namen tab).
2.8 MACRO INVOCATION DETAILS
The invocation of a macro, indefinite repeat block, or repeat
block has specific implications for .if-.else-.endif constructs
and for .list-.nlist directives.
At the point a macro, indefinite repeat block, or repeat
block is called the following occurs:
1) The initial .if-.else-.endif
state is saved.
2) The initial .list-.nlist
state is saved.
3) The macro, indefinite repeat block,
or repeat block is inserted into the
assembler source code stream. All
argument substitution is performed
at this point.
When the macro completes and after each pass through an inde-
finite repeat block or repeat block the .if-.else-.endif and
.list-.nlist state is reset to the initial state.
The reset of the .if-.else-.endif state means that the invo-
cation of a macro, indefinite repeat block, or repeat block can-
not change the .if-.else-.endif state of the calling code. For
example the following code does not change the .if-.else-.endif
condition at macro completion:
THE MACRO PROCESSOR PAGE 2-20
MACRO INVOCATION DETAILS
.macro fnc A
.if nb,^!A!
...
.list (meb)
.mexit
.else
...
.nlist
.mexit
.endif
.endm
code: fnc
Within the macro the .if condition becomes false but the con-
dition is not propagated outside the macro.
Similarly, when the .list-.nlist state is changed within a
macro the change is not propogated outside the macro.
The normal .if-.else-.endif processing verifies that every
.if has a corresponding .endif. When a macro, indefinite repeat
block, or repeat block terminates by using the .mexit directive
the .if-.endif checking is bypassed because all source lines
between the .mexit and .endm directives are skipped.
2.9 BUILDING A MACRO LIBRARY
Using the macro facilities of the ASxxxx assemblers a simple
macro library can be built. The macro library is built by com-
bining individual macros, sets of macros, or include file direc-
tives into a single file. Each macro entity is enclosed within
a .if/.endif block that selects the desired macro definitions.
The selection of specific macros to be imported in a program
is performed by three macros, .mlib, .mcall, and .mload, con-
tained in the file mlib.def.
THE MACRO PROCESSOR PAGE 2-21
BUILDING A MACRO LIBRARY
2.9.1 .mlib Macro Directive
Format:
.mlib file
where: file represents the macro library file name.
If the file name does not include a path
then the path of the current assembly
file is used. If the file name (and/or
path) contains white space then the
path/name must be delimited with the
up-arrow (^) construct ^/ /.
The .mlib directive defines two macros, .mcall and .mload, which
when invoked will read a file, importing specific macro defini-
tions. Any previous .mcall and/or .mload directives will be
deleted before the new .mcall and .mload directives are defined.
The .mload directive is an internal directive which simply
includes the macro library file with the listing disabled.
The following is the mlib.def file which defines the macros
.mlib, .mcall, and .mload.
THE MACRO PROCESSOR PAGE 2-22
BUILDING A MACRO LIBRARY
;************************************************
;* *
;* A simple Macro Library Implementation *
;* *
;* December 2008 *
;* *
;************************************************
.macro .mlib FileName
.if b,^!FileName!
.error 1 ; File Name Required
.mexit
.endif
.mdelete .mcall
.macro .mcall a,b,c,d,e,f,g,h
.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
.iif nb,^!sym! .define .$$.'sym
.endm
.mload
.irp sym ^!a!,^!b!,^!c!,^!d!,^!e!,^!f!,^!g!,^!h!
.if nb,^!sym!
.iif ndef,sym'.$$. .error 1 ; macro not found
.undefine .$$.'sym
.undefine sym'.$$.
.endif
.endm
.endm ;.mcall
.mdelete .mload
.macro .mload
.nlist
.include ^!FileName!
.list
.endm ;.mload
.endm ;.mlib
2.9.2 .mcall Macro Directive
Format:
.mcall macro1,macro2,...,macro8
where:
macro1, represents from 1 to 8 macro library
macro2, references to a macro definition or
..., set of macro definitions included in
macro8 the file specified with the .mlib macro.
As can be seen from the macro definition of .mlib and .mcall
shown above, when .mcall is invoked temporary symbols are
THE MACRO PROCESSOR PAGE 2-23
BUILDING A MACRO LIBRARY
defined for each macro or macro set that is to be imported. The
macro .mload is then invoked to load the macro library file
specified in the call to .mlib.
For example, when the following macros are invoked:
.mlib crossasm.sml ; Cross Assembler Macros
.mcall M6809 ; M6809 Macro Group
The .mlib macro defines the .mload macro to access the system
macro file crossasm.sml. Invoking the .mcall macro creates a
temporary symbol, '.$$.M6809', and then invokes the macro .mload
to import the system macro file crossasm.sml. The file cros-
sasm.sml contains conditional statements that define the re-
quired macros and creates a temporary symbol 'M6809.$$.' to
indicate the macro group was found. If the macro is not found
an error message is generated.
The following is a small portion of the crossasm.sml system
macro file which shows the M6809 macro group:
.title Cross Assembler Macro Library
; This MACRO Library is Case Insensitive.
;
...
; Macro Based 6809 Cross Assembler
.$.SML.$. =: 0
.if idn a,A
.iif def,.$$.m6809 .$.SML.$. = -1
.else
.iif def,.$$.m6809 .$.SML.$. = -1
.iif def,.$$.M6809 .$.SML.$. = 1
.endif
.iif lt,.$.SML.$. .define m6809.$$.
.iif gt,.$.SML.$. .define M6809.$$.
.iif ne,.$.SML.$. .include "m6809.mac"
...
THE MACRO PROCESSOR PAGE 2-24
EXAMPLE MACRO CROSS ASSEMBLERS
2.10 EXAMPLE MACRO CROSS ASSEMBLERS
The 'ascheck' subdirectory 'macroasm' contains 7 assemblers
written using only the general macro processing facility of the
ASxxxx assemblers:
i8085.mac - 8085 Microprocessor
m6800.mac - 6800 Microprocessor
m6801.mac - 6801 Microprocessor
m6804.mac - 6804 Microprocessor
m6805.mac - 6805 Microprocessor
m6809.mac - 6809 Microprocessor
s2650.mac - 2650 Microprocessor
These absolute macro cross assemblers are included to il-
lustrate the functionality of the general macro processing
facility of the ASxxxx assemblers. In general they are useful
examples of actual macro implementations.
CHAPTER 3
THE LINKER
3.1 ASLINK RELOCATING LINKER
ASLINK is the companion linker for the ASxxxx assemblers.
The program ASLINK is a general relocating linker performing
the following functions:
1. Bind multiple object modules into a single memory image
2. Resolve inter-module symbol references
3. Combine code belonging to the same area from multiple
object files into a single contiguous memory region
4. Search and import object module libraries for undefined
global variables
5. Perform byte and word program counter relative
(pc or pcr) addressing calculations
6. Define absolute symbol values at link time
7. Define absolute area base address values at link time
8. Produce Intel Hex or Motorola S19 output file
9. Produce a map of the linked memory image
10. Produce an updated listing file with the relocated ad-
dresses and data
THE LINKER PAGE 3-2
INVOKING ASLINK
3.2 INVOKING ASLINK
Starting ASlink without any arguments provides the following
option list and then exits:
Usage: [-Options] [-Option with arg] file
Usage: [-Options] [-Option with arg] outfile file [file ...]
-p Echo commands to stdout (default)
-n No echo of commands to stdout
Alternates to Command Line Input:
-c ASlink >> prompt input
-f file[.lnk] Command File input
Librarys:
-k Library path specification, one per -k
-l Library file specification, one per -l
Relocation:
-b area base address=expression
-g global symbol=expression
Map format:
-m Map output generated as (out)file[.map]
-w Wide listing format for map file
-x Hexadecimal (default)
-d Decimal
-q Octal
Output:
-i Intel Hex as (out)file[.i--]
-s Motorola S Record as (out)file[.s--]
-j NoICE Debug output as (out)file[.noi]
-y SDCDB Debug output as (out)file[.cdb]
-o Linked file/library object output enable (default)
-v Linked file/library object output disable
List:
-u Update listing file(s) with link data as file(s)[.rst]
Case Sensitivity:
-z Disable Case Sensitivity for Symbols
End:
-e or null line terminates input
NOTE
When ASlink is invoked with a single filename the
created output file will have the same filename as the
.rel file.
When ASlink is invoked with multiple filenames the
first filename is the output filename and the remain-
ing filenames are linked together into the output
THE LINKER PAGE 3-3
INVOKING ASLINK
filename.
Most sytems require the options to be entered on the command
line:
aslink [-Options] [-Options with args] file
aslink [-Options] [-Options with args] outfile file1 [file2
...]
Some systems may request the arguments after the linker is
started at a system specific prompt:
aslink
argv: -[options] -[option arg] file
aslink
argv: [-Options] [-Options with args] outfile file1 [file2
...]
The linker commands are explained in some more detail:
1. -c ASlink >> prompt mode.
The ASlink >> prompt mode reads linker commands from
stdin.
2. -f file Command file mode.
The command file mode imports linker commands from the
specified file (extension must be .lnk), imported -c
and -f commands are ignored. If the directory path,
for a file to be linked, is not specified in the com-
mand file then the path defaults to the .lnk file
directory path.
3. -p/-n enable/disable echoing commands to stdout.
4. -i/-s Intel Hex (file.i--), or Motorola S (file.s--)
image output file.
5. -o/-v Specifies that subsequent linked
files/libraries will generate object output (default)
or suppress object output. (if option -i, -s, or -t
was specified)
6. -z Disable Case Sensitivity for Symbols
THE LINKER PAGE 3-4
INVOKING ASLINK
7. -m Generate a map file (file.map). This file
contains a list of the symbols (by area) with absolute
addresses, sizes of linked areas, and other linking in-
formation.
8. -w Specifies that a wide listing format be used
for the map file.
9. -xdq Specifies the number radix for the map file
(Hexadecimal, Decimal, or Octal).
10. -u Generate an updated listing file (file.rst)
derived from the relocated addresses and data from the
linker.
11. file File(s) to be linked. Files may be on the
same line as the above options or on a separate line(s)
one file per line or multiple files separated by spaces
or tabs.
12. -b area=expression
(one definition per line in a linker command file.)
This specifies an area base address where the expres-
sion may contain constants and/or defined symbols from
the linked files.
13. -g symbol=expression
(one definition per line in a linker command file.)
This specifies the value for the symbol where the ex-
pression may contain constants and/or defined symbols
from the linked files.
14. -k library directory path
(one definition per line in a linker command file.)
This specifies one possible path to an object library.
More than one path is allowed.
15. -l library file specification
(one definition per line in a linker command file.)
This specifies a possible library file. More than one
file is allowed.
16. -e or null line, terminates input to the linker.
ASLINK linker supported by and distributed with SDCC are:
sdld
sdld specific options:
Miscellaneous:
-I [iram-size] Check for internal RAM overflow
-X [xram-size] Check for external RAM overflow
-C [code-size] Check for code overflow
-M Generate memory usage summary file[mem]
-Y Pack internal ram
-S [stack-size] Allocate space for stack
-E ELF executable as file[elf]
THE LINKER PAGE 3-5
LIBRARY PATH(S) AND FILE(S)
3.3 LIBRARY PATH(S) AND FILE(S)
The process of resolving undefined symbols after scanning the
input object files includes the scanning of object module
libraries. The linker will search through all combinations of
the library path specifications (input by the -k option) and the
library file specifications (input by the -l option) that lead
to an existing library file. Each library file contains a list
(one file per line) of modules included in this particular
library. Each existing object module is scanned for a match to
the undefined symbol. The first module containing the symbol is
then linked with the previous modules to resolve the symbol de-
finition. The library object modules are rescanned until no
more symbols can be resolved. The scanning algorithm allows
resolution of back references. No errors are reported for non
existant library files or object modules.
The library file specification may be formed in one of two
ways:
1. If the library file contained an absolute path/file
specification then this is the object module's
path/file.
(i.e. C:\... or C:/...)
2. If the library file contains a relative path/file
specification then the concatenation of the path and
this file specification becomes the object module's
path/file.
(i.e. \... or /...)
As an example, assume there exists a library file termio.lib
in the syslib directory specifying the following object modules:
\6809\io_disk first object module
d:\special\io_comm second object module
and the following parameters were specified to the linker:
-k c:\iosystem\ the first path
-k c:\syslib\ the second path
-l termio the first library file
-l io the second library file (no such file)
The linker will attempt to use the following object modules to
resolve any undefined symbols:
c:\syslib\6809\io_disk.rel (concatenated path/file)
d:\special\io_comm.rel (absolute path/file)
THE LINKER PAGE 3-6
LIBRARY PATH(S) AND FILE(S)
all other path(s)/file(s) don't exist. (No errors are reported
for non existant path(s)/file(s).)
3.4 ASLINK PROCESSING
The linker processes the files in the order they are
presented. The first pass through the input files is used to
define all program areas, the section area sizes, and symbols
defined or referenced. Undefined symbols will initiate a search
of any specified library file(s) and the importing of the module
containing the symbol definition. After the first pass the -b
(area base address) definitions, if any, are processed and the
areas linked.
The area linking proceeds by first examining the area types
ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
object modules are always overlayed and have been assembled at a
specific address, these are not normally relocated (if a -b com-
mand is used on an absolute area the area will be relocated).
Relative areas (normally defined as REL|CON) have a base address
of 0x0000 as read from the object files, the -b command speci-
fies the beginning address of the area. All subsequent relative
areas will be concatenated with proceeding relative areas.
Where specific ordering is desired, the first linker input file
should have the area definitions in the desired order. At the
completion of the area linking all area addresses and lengths
have been determined. The areas of type PAG are verified to be
on a 256 byte boundary and that the length does not exceed 256
bytes. Any errors are noted on stderr and in the map file.
Next the global symbol definitions (-g option), if any, are
processed. The symbol definitions have been delayed until this
point because the absolute addresses of all internal symbols are
known and can be used in the expression calculations.
Before continuing with the linking process the symbol table
is scanned to determine if any symbols have been referenced but
not defined. Undefined symbols are listed on the stderr device.
if a .module directive was included in the assembled file the
module making the reference to this undefined variable will be
printed.
Constants defined as global in more than one module will be
flagged as multiple definitions if their values are not identi-
cal.
After the preceeding processes are complete the linker may
output a map file (-m option). This file provides the following
information:
THE LINKER PAGE 3-7
ASLINK PROCESSING
1. Global symbol values and label absolute addresses
2. Defined areas and there lengths
3. Remaining undefined symbols
4. List of modules linked
5. List of library modules linked
6. List of -b and -g definitions
The final step of the linking process is performed during the
second pass of the input files. As the xxx.rel files are read
the code is relocated by substituting the physical addresses for
the referenced symbols and areas and may be output in Intel or
Motorola formats. The number of files
linked and symbols defined/referenced is limited by the proces-
sor space available to build the area/symbol lists. If the -u
option is specified then the listing files (file.lst) associated
with the relocation files (file.rel) are scanned and used to
create a new file (file.rst) which has all addresses and data
relocated to their final values.
The -o/-v options allow the simple creation of loadable or
overlay modules. Loadable and overlay modules normally need to
be linked with a main module(s) to resolve external symbols.
The -o/-v options can be used to enable object output for the
loadable or overlay module(s) and suppress the object code from
the linked main module(s). The -o/-v options can be applied
repeatedly to specify a single linked file, groups of files, or
libraries for object code inclusion or suppression.
THE LINKER Page 3-15
ASXXXX VERSION 3.XX LINKING
3.6 ASXXXX VERSION 3.XX LINKING
The linkers' input object file is an ascii file containing
the information needed by the linker to bind multiple object
modules into a complete loadable memory image.
The object module contains the following designators:
[XDQ][HL][234]
X Hexadecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
2 16-Bit Addressing
3 24-Bit Addressing
4 32-Bit Addressing
H Header
M Module
A Area
S Symbol
T Object code
R Relocation information
P Paging information
3.6.1 Object Module Format
The first line of an object module contains the
[XDQ][HL][234] format specifier (i.e. XH2 indicates a hexa-
decimal file with most significant byte first and 16-bit ad-
dressing) for the following designators.
3.6.2 Header Line
H aa areas gg global symbols
The header line specifies the number of areas(aa) and the
number of global symbols(gg) defined or referenced in this ob-
ject module segment.
THE LINKER PAGE 3-16
ASXXXX VERSION 3.XX LINKING
3.6.3 Module Line
M name
The module line specifies the module name from which this
header segment was assembled. The module line will not appear
if the .module directive was not used in the source program.
3.6.4 Area Line
A label size ss flags ff
The area line defines the area label, the size (ss) of the
area in bytes, and the area flags (ff). The area flags specify
the ABS, REL, CON, OVR, and PAG parameters:
OVR/CON (0x04/0x00 i.e. bit position 2)
ABS/REL (0x08/0x00 i.e. bit position 3)
PAG (0x10 i.e. bit position 4)
3.6.5 Symbol Line
S name Defnnnn
or
S name Refnnnn
The symbol line defines (Def) or references (Ref) the identi-
fier name with the value nnnn. The defined value is relative to
the current area base address. References to constants and ex-
ternal global symbols will always appear before the first area
definition. References to external symbols will have a value of
zero.
3.6.6 T Line
T xx xx nn nn nn nn nn ...
The T line contains the assembled code output by the assem-
bler with xx xx being the offset address from the current area
base address and nn being the assembled instructions and data in
byte format.
THE LINKER PAGE 3-17
ASXXXX VERSION 3.XX LINKING
3.6.7 R Line
R 0 0 nn nn n1 n2 xx xx ...
The R line provides the relocation information to the linker.
The nn nn value is the current area index, i.e. which area the
current values were assembled. Relocation information is en-
coded in groups of 4 bytes:
1. n1 is the relocation mode and object format, for the
adhoc extension modes refer to asxxxx.h or aslink.h
1. bit 0 word(0x00)/byte(0x01)
2. bit 1 relocatable area(0x00)/symbol(0x02)
3. bit 2 normal(0x00)/PC relative(0x04) relocation
4. bit 3 1-byte(0x00)/2-byte(0x08) object format
5. bit 4 signed(0x00)/unsigned(0x10) byte data
6. bit 5 normal(0x00)/page '0'(0x20) reference
7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
8. bit 7 LSB byte(0x00)/MSB byte(0x80)
2. n2 is a byte index into the corresponding (i.e. pre-
ceeding) T line data (i.e. a pointer to the data to be
updated by the relocation). The T line data may be
1-byte or 2-byte byte data format or 2-byte word
format.
3. xx xx is the area/symbol index for the area/symbol be-
ing referenced. the corresponding area/symbol is found
in the header area/symbol lists.
The groups of 4 bytes are repeated for each item requiring relo-
cation in the preceeding T line.
3.6.8 P Line
P 0 0 nn nn n1 n2 xx xx
The P line provides the paging information to the linker as
specified by a .setdp directive. The format of the relocation
information is identical to that of the R line. The correspond-
ing T line has the following information:
T xx xx aa aa bb bb
Where aa aa is the area reference number which specifies the
selected page area and bb bb is the base address of the page.
bb bb will require relocation processing if the 'n1 n2 xx xx' is
specified in the P line. The linker will verify that the base
address is on a 256 byte boundary and that the page length of an
area defined with the PAG type is not larger than 256 bytes.
THE LINKER PAGE 3-18
ASXXXX VERSION 3.XX LINKING
The linker defaults any direct page references to the first
area defined in the input REL file. All ASxxxx assemblers will
specify the _CODE area first, making this the default page area.
3.6.9 24-Bit and 32-Bit Addressing
When 24-bit or 32-bit addressing is specified in the file
format line [XDQ][HL][234] then the S and T Lines have modified
formats:
S name Defnnnnnn (24-bit)
S name Refnnnnnn (24-bit)
T xx xx xx nn nn nn nn nn ... (24-bit)
S name Defnnnnnnnn (32-bit)
S name Refnnnnnnnn (32-bit)
T xx xx xx xx nn nn nn nn nn ... (32-bit)
The multibyte formats for byte data replace the 2-byte form
for 16-bit data with 3-byte or 4-byte data for 24-bit or 32-bit
data respectively. The 2nd byte format (also named MSB) always
uses the second byte of the 2, 3, or 4-byte data.
3.6.10 ASlink V3.xx Error Messages
The linker provides detailed error messages allowing the pro-
grammer to quickly find the errant code. As the linker com-
pletes pass 1 over the input file(s) it reports any page
boundary or page length errors as follows:
?ASlink-Warning-Paged Area PAGE0 Boundary Error
and/or
?ASlink-Warning-Paged Area PAGE0 Length Error
where PAGE0 is the paged area.
During Pass two the linker reads the T, R, and P lines per-
forming the necessary relocations and outputting the absolute
code. Various errors may be reported during this process
THE LINKER PAGE 3-19
ASXXXX VERSION 3.XX LINKING
The P line processing can produce only one possible error:
?ASlink-Warning-Page Definition Boundary Error
file module pgarea pgoffset
PgDef t6809l t6809l PAGE0 0001
The error message specifies the file and module where the .setdp
direct was issued and indicates the page area and the page
offset value determined after relocation.
The R line processing produces various errors:
?ASlink-Warning-Byte PCR relocation error for symbol bra2
?ASlink-Warning-Unsigned Byte error for symbol two56
?ASlink-Warning-Page0 relocation error for symbol ltwo56
?ASlink-Warning-Page Mode relocation error for symbol two56
?ASlink-Warning-Page Mode relocation error
?ASlink-Warning-2K Page relocation error
?ASlink-Warning-512K Page relocation error
These error messages also specify the file, module, area, and
offset within the area of the code referencing (Refby) and de-
fining (Defin) the symbol:
?ASlink-Warning-Unsigned Byte error for symbol two56
file module area offset
Refby t6800l t6800l DIRECT 0015
Defin tconst tconst . .ABS. 0100
If the symbol is defined in the same module as the reference the
linker is unable to report the symbol name. The assembler list-
ing file(s) should be examined at the offset from the specified
area to locate the offending code.
The errors are:
1. The byte PCR error is caused by exceeding the pc rela-
tive byte branch range.
2. The Unsigned byte error indicates an indexing value was
negative or larger than 255.
3. The Page0 error is generated if the direct page vari-
able is not in the page0 range of 0 to 255.
4. The page mode error is generated if the direct variable
is not within the current direct page (6809).
5. The 2K Page relocation error is generated if the
destination is not within the current 2K page (8051,
DS8xCxxx).
THE LINKER PAGE 3-20
ASXXXX VERSION 3.XX LINKING
6. The 512K Page relocation error is generated if the
destination is not within the current 512K page
(DS80C390).
THE LINKER Page 3-21
INTEL IHX OUTPUT FORMAT
3.7 INTEL IHX OUTPUT FORMAT (16-BIT)
Record Mark Field - This field signifies the start of a
record, and consists of an ascii colon
(:).
Record Length Field - This field consists of two ascii
characters which indicate the number of
data bytes in this record. The
characters are the result of converting
the number of bytes in binary to two
ascii characters, high digit first. An
End of File record contains two ascii
zeros in this field.
Load Address Field - This field consists of the four ascii
characters which result from converting
the the binary value of the address in
which to begin loading this record. The
order is as follows:
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either four ascii zeros or the
program entry address.
Record Type Field - This field identifies the record type,
which is either 0 for data records or 1
for an End of File record. It consists
of two ascii characters, with the high
digit of the record type first, followed
by the low digit of the record type.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, the record type field,
and the data field. This sum is then
negated (2's complement) and converted
to two ascii characters, high digit
first.
THE LINKER Page 3-22
INTEL I86 OUTPUT FORMAT
3.8 INTEL I86 OUTPUT FORMAT (24 OR 32-BIT)
Record Mark Field - This field signifies the start of a
record, and consists of an ascii colon
(:).
Record Length Field - This field consists of two ascii
characters which indicate the number of
data bytes in this record. The
characters are the result of converting
the number of bytes in binary to two
ascii characters, high digit first. An
End of File record contains two ascii
zeros in this field.
Load Address Field - This field consists of the four ascii
characters which result from converting
the the binary value of the address in
which to begin loading this record. The
order is as follows:
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either four ascii zeros or the
program entry address.
Record Type Field - This field identifies the record type,
which is either 0 for data records, 1
for an End of File record, or 4 for a
segment record. It consists of two
ascii characters, with the high digit of
the record type first, followed by the
low digit of the record type.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, the record type field,
and the data field. This sum is then
negated (2's complement) and converted
to two ascii characters, high digit
first.
THE LINKER Page 3-23
MOTOROLA S1-S9 OUTPUT FORMAT
3.9 MOTORLA S1-S9 OUTPUT FORMAT (16-BIT)
Record Type Field - This field signifies the start of a
record and identifies the the record
type as follows:
Ascii S1 - Data Record
Ascii S9 - End of File Record
Record Length Field - This field specifies the record length
which includes the address, data, and
checksum fields. The 8 bit record
length value is converted to two ascii
characters, high digit first.
Load Address Field - This field consists of the four ascii
characters which result from converting
the the binary value of the address in
which to begin loading this record. The
order is as follows:
High digit of high byte of address.
Low digit of high byte of address.
High digit of low byte of address.
Low digit of low byte of address.
In an End of File record this field con-
sists of either four ascii zeros or the
program entry address.
Data Field - This field consists of the actual data,
converted to two ascii characters, high
digit first. There are no data bytes in
the End of File record.
Checksum Field - The checksum field is the 8 bit binary
sum of the record length field, the load
address field, and the data field. This
sum is then complemented (1's comple-
ment) and converted to two ascii
characters, high digit first.
CHAPTER 4
BUILDING ASXXXX AND ASLINK
The assemblers and linker have been successfully compiled for
Linux, DOS, and various flavors of Windows using the Linux GCC,
the Cygwin environment, the DJGPP environment, and the graphical
user interfaces and command line environments of
MS Visual C++ V6.0, MS Visual Studio 2005,
MS Visual Studio 2010, Open Watcom V1.7, Symantec C/C++ V7.2,
and Turbo C 3.0.
Makefiles for Linux, Cygwin, DJGPP, project files and a
makefile for Turbo C and psuedo makefiles and project files for
VC6, VS2005, VS2010, Open Watcom and Symantec are available to
build all the assemblers and the linker.
Unpack the asxv5pxx.zip file into an appropriate directory
using the utility appropriate to your environment. For DOS or
Windows the following command line will unpack the distribution
zip file:
pkunzip -d asxv5pxx.zip
The distribution file has been packed with DOS style end of
lines (CR/LF), and UPPER CASE file names. The Linux make file
assumes all lower case directories and file names. For Linux
the unpacking utility you choose should have an option to force
all lower case directories / file names and convert the ascii
files to local format. On most systems the following command
should do the trick:
unzip -L -a asxv5pxx.zip
Some systems may require a -LL option to force all lower case.
The distribution will be unpacked into the base directory
'asxv5pxx' which will contain source directories for each sup-
ported processor (as6800, asz80, ...), the machine independent
source (asxxsrc), the linker source (linksrc), and the
BUILDING ASXXXX AND ASLINK Page 4-2
miscellaneous sources (asxxmisc). Other directories include the
documentation (asxdoc), test file directory (asxtst), html do-
cumentation (asxhtml), NoICE support files (noice), various
debug monitors that can be assembled with the ASxxxx assemblers
(asmasm), project files for an application that uses the AS6809
assembler and ASlink linker (project), and the packaging direc-
tory (zipper).
4.1 BUILDING ASXXXX AND ASLINK WITH LINUX
The Linux build directory is /asxv5pxx/asxmak/linux/build.
The makefile in this directory is compatible with the Linux GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
/asxv5pxx/asxmak/linux/exe and all the compiled object modules
from the /asxv5pxx/asxmak/linux/build directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
4.2 BUILDING ASXXXX AND ASLINK UNDER CYGWIN
The Cygwin build directory is \asxv5pxx\asxmak\cygwin\build.
The makefile in this directory is compatible with the Cygwin GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
\asxv5pxx\asxmak\cygwin\exe and all the compiled object modules
from the \asxv5pxx\asxmak\cygwin\build directory. The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific
BUILDING ASXXXX AND ASLINK PAGE 4-3
BUILDING ASXXXX AND ASLINK UNDER CYGWIN
assembler, linker, or utility you wish to build:
make aslink
4.3 BUILDING ASXXXX AND ASLINK WITH DJGPP
The DJGPP build directory is \asxv5pxx\asxmak\djgpp\build.
The makefile in this directory is compatible with the DJGPP GNU
make and GCC. The command
make clean
will remove all the current executable files in directory
\asxv5pxx\asxmak\djgpp\exe and all the compiled object modules
from the \asxv5pxx\asxmak\djgpp\build directory. The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
4.4 BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
The Borland product is available in the Borland Turbo C++
Suite which contains C++ Builder 1.0, Turbo C++ 4.5 for Windows
and Turbo C++ 3.0 for DOS. The DOS IDE will install and run on
x86 (16 or 32 bit) versions of Windows (not x64 versions).
4.4.1 Graphical User Interface
Each ASxxxx Assembler has two project specific files
(*.dsk and *.prj) located in the subdirectory
\asxv5pxx\asxmak\turboc30\build. You must enter the .prj
filename into the Turbo C++ IDE: enter Options->Directories and
change the include and output directories to match your confi-
guration. After these changes have been made you will be able
to compile the selected project. These changes must be manually
entered for each project.
BUILDING ASXXXX AND ASLINK PAGE 4-4
BUILDING ASXXXX AND ASLINK WITH BORLAND'S TURBO C++ 3.0
4.4.2 Command Line Interface
Before the command line interface can be used you must per-
form the steps outlined in the 'Graphical User Interface' in-
structions above for each project you wish to build.
Open a command prompt window in the
\asxv5pxx\asxmak\turboc30\build directory. Assuming the Turbo C
compiler has been installed in the default location (C:\TC) the
file _setpath.bat will set the PATH variable. If this is not
the case then the line
PATH=C:\TC;C:\TC\BIN;C:\TC\INCLUDE
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\turboc30\build\ directory and the executable
files will be placed in the \asxv5pxx\asxmak\turboc30\exe direc-
tory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The Turbo C make utility uses the information in the correspond-
ing .prj and .dsk files to compile and link the programs.
The file _makeall.bat found in the directory can also be used
to invoke the Turbo C command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
directories in the environment variable PATH and then invokes
'make all'.
BUILDING ASXXXX AND ASLINK PAGE 4-5
BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
4.5 BUILDING ASXXXX AND ASLINK WITH MS VISUAL C++ 6.0
4.5.1 Graphical User Interface
Each ASxxxx Assembler has a VC6 project file (*.dsw) located
in a subdirectory of \asxv5pxx\asxmak\vc6\build. Simply enter
this project filename into the VC6 IDE and build/rebuild the as-
sembler.
4.5.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vc6\build directory. The file make.bat found
in the directory can be used to invoke the VC6 command line com-
piler. The make.bat file assumes that the Visual C++ compiler
has been installed in the default location. If this is not the
case then the line
SET MS$DEV="C:\Program Files\Microsoft Visual Studio\
Common\MSDev98\Bin\msdev.exe"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vc6\build\as----\release directory and the exe-
cutable files will be placed in the \asxv5pxx\asxmak\vc6\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The VC6 command line compiler uses the information in the cor-
responding .dsw/.dsp files to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
BUILDING ASXXXX AND ASLINK PAGE 4-6
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
4.6 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2005
4.6.1 Graphical User Interface
Each ASxxxx Assembler has a VS2005 project file (*.vcproj)
located in a subdirectory of \asxv5pxx\asxmak\vs05\build. Sim-
ply enter this project filename into the VS2005 IDE and
build/rebuild the assembler.
4.6.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs05\build directory. The file make.bat found
in the directory can be used to invoke the VS2005 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
SET VC$BUILD="C:\Program Files\Microsoft Visual Studio 8\
Common\MSDev98\Bin\msdev.exe"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs05\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs05\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The VS2005 command line compiler uses the information in the
corresponding .vcproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
BUILDING ASXXXX AND ASLINK PAGE 4-7
BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
4.7 BUILDING ASXXXX AND ASLINK WITH MS VISUAL STUDIO 2010
4.7.1 Graphical User Interface
Each ASxxxx Assembler has a VS2010 project file (*.vcxproj)
located in a subdirectory of \asxv5pxx\asxmak\vs10\build. Sim-
ply enter this project filename into the VS2010 IDE and
build/rebuild the assembler.
4.7.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\vs10\build directory. The file make.bat found
in the directory can be used to invoke the VS2010 command line
compiler. The make.bat file assumes that the Visual C++ com-
piler has been installed in the default location. If this is
not the case then the line
call "c:\Program Files (x86)\Microsoft Visual Studio 10.0\
VC\bin\vcvars32.bat"
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\vs10\build\as----\release directory and the ex-
ecutable files will be placed in the \asxv5pxx\asxmak\vs10\exe
directory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The VS2010 command line compiler uses the information in the
corresponding .vcxproj file to compile and link the programs.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
BUILDING ASXXXX AND ASLINK PAGE 4-8
BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
4.8 BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
4.8.1 Graphical User Interface
Each ASxxxx Assembler has a set of project files (.prj, .tgt,
.mk, .mk1, and .lk1) located in the subdirectory
\asxv5pxx\asxmak\watcom\build. You will have to edit the pro-
ject files to match your local file locations.
4.8.2 Command Line Interface
Open a command prompt window in the
\asxv5pxx\asxmak\watcom\build directory. Assuming the Watcom
compiler has been installed in the default location (C:\WATCOM)
the file _setpath.bat will set the PATH variable. If this is
not the case then the line
PATH=C:\WATCOM\BINNT;C:\WATCOM\BINW
must be changed to match your environment. The compiled object
code modules will be placed in the
\asxv5pxx\asxmak\watcom\build\ directory and the executable
files will be placed in the \asxv5pxx\asxmak\watcom\exe direc-
tory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The Watcom command line compiler wmake.exe uses the information
in the corresponding project files to compile and link the pro-
grams.
The file _makeall.bat found in the directory can also be used
to invoke the Watcom command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
BUILDING ASXXXX AND ASLINK PAGE 4-9
BUILDING ASXXXX AND ASLINK WITH OPEN WATCOM V1.9
directories in the environment variable PATH and then invokes
'make all'.
The command 'make clean' is not required or valid as a make
of anything does a complete rebuild of the program.
4.9 BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
The Symantec product is no longer available but is included
for historical reasons (the final version, 7.5, was introduced
in 1996). The product had an excellent graphical user inter-
face, built in editor, project manager, and supported DOS, Ex-
tended DOS (the executable contained a built in DOS extender
which was rendered unusable in Windows 2000, after service pack
2, or in Windows XP), Win95, and Windows NT.
4.9.1 Graphical User Interface
Each ASxxxx Assembler has a series of project specific files
(*.bro, *.def, *.dpd, *.lnk, *.mak, *.opn, and *.prj) located in
in the subdirectory \asxv5pxx\asxmak\symantec\build. You must
enter the .prj filename into the Symantec IDE and then select
Project->Settings->Directories and change the include, target,
and compiler output directories to match your configuration.
After these changes have been made you will be able to compile
the selected project. These changes must be manually entered
for each project.
4.9.2 Command Line Interface
Before the command line interface can be used you must per-
form the steps outlined in the 'Graphical User Interface' in-
structions above for each project you wish to build.
Open a command prompt window in the
\asxv5pxx\asxmak\symantec\build directory. The file make.bat
found in the directory can be used to invoke the Symantec com-
mand line compiler. The make.bat file assumes that the path to
the compiler directories has been set in the environment vari-
able PATH. Assuming the Symantec compiler has been installed in
the default location (C:\SC) the file _setpath.bat will set the
PATH variable. If this is not the case then the line
PATH=C:\SC;C:\SC\BIN;C:\SC\INCLUDE;C:\SC\LIB
must be changed to match your environment. The compiled object
BUILDING ASXXXX AND ASLINK PAGE 4-10
BUILDING ASXXXX AND ASLINK WITH SYMANTEC C/C++ V7.2
code modules will be placed in the
\asxv5pxx\asxmak\symantec\build directory and the executable
files will be placed in the \asxv5pxx\asxmak\symantec\exe direc-
tory.
The command
make all
will compile and link all the ASxxxx assemblers, the ASlink pro-
gram, and the utility programs asxscn and asxcnv. The make file
can make a single program by invoking make with the specific as-
sembler, linker, or utility you wish to build:
make aslink
The Symantec make utility , smake.exe, uses the information in
the corresponding .mak files to compile and link the programs.
The file _makeall.bat found in the directory can also be used
to invoke the Symantec command line compiler. The _makeall.bat
file calls the _setpath.bat file to set the path to the compiler
directories in the environment variable PATH and then invokes
'make all'.
4.10 THE _CLEAN.BAT AND _PREP.BAT FILES
Each of the build directories have two maintenance files:
_prep.bat and _clean.bat. The command file _prep.bat prepares
the particular compiler directories for distribution by removing
all exteraneous files but keeping the final compiled execut-
ables. The _clean.bat command file performs the same function
as _prep.bat and removes the compiled executables.
APPENDIX AK
AS68(HC[S])08 ASSEMBLER
AK.1 PROCESSOR SPECIFIC DIRECTIVES
The MC68HC(S)08 processor is a superset of the MC6805 proces-
sors. The AS6808 assembler supports the HC08, HCS08, 6805, and
HC05 cores.
AK.1.1 .hc08 Directive
Format:
.hc08
The .hc08 directive enables processing of only the HC08 specific
mnemonics. 6805/HC05/HCS08 mnemonics encountered without the
.hc08 directive will be flagged with an 'o' error.
The .hc08 directive also selects the HC08 specific cycles
count to be output.
AK.1.2 .hcs08 Directive
Format:
.hcs08
The .hcs08 directive enables processing of the HCS08 specific
mnemonics.
The .hcs08 directive also selects the HCS08 specific cycles
count to be output.
AS68(HC[S])08 ASSEMBLER PAGE AK-2
PROCESSOR SPECIFIC DIRECTIVES
AK.1.3 .6805 Directive
Format:
.6805
The .6805 directive enables processing of only the 6805/HC05
specific mnemonics. HC08/HCS08 mnemonics encountered without
the .hc08/.hcs08 directives will be flagged with an 'o' error.
The .6805 directive also selects the MC6805 specific cycles
count to be output.
AK.1.4 .hc05 Directive
Format:
.hc05
The .hc05 directive enables processing of only the 6805/HC05
specific mnemonics. HC08/HCS08 mnemonics encountered without
the .hc08/.hcs08 directives will be flagged with an 'o' error.
The .hc05 directive also selects the MC68HC05/146805 specific
cycles count to be output.
AK.1.5 The .__.CPU. Variable
The value of the pre-defined symbol '.__.CPU.' corresponds to
the selected processor type. The default value is 0 which cor-
responds to the default processor type. The following table
lists the processor types and associated values for the AS6808
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.hc08 0
.hcs08 1
.6805 2
.hc05 3
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
AS68(HC[S])08 ASSEMBLER PAGE AK-3
PROCESSOR SPECIFIC DIRECTIVES
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that seperately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AK.2 68HC(S)08 REGISTER SET
The following is a list of the 68HC(S)08 registers used by
AS6808:
a - 8-bit accumulator
x - index register <H:X>
s - stack pointer
AK.3 68HC(S)08 INSTRUCTION SET
The following tables list all 68HC(S)08 mnemonics recognized
by the AS6808 assembler. The designation [] refers to a re-
quired addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6808:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indexed addressing
zero offset
offset,x register indexed addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
,x+ register indexed addressing
zero offset with post increment
offset,x+ register indexed addressing
unsigned byte offset with post increment
offset,s stack pointer indexed addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
AS68(HC[S])08 ASSEMBLER PAGE AK-4
68HC(S)08 INSTRUCTION SET
ext extended addressing
label branch label
The terms data, dir, offset, and ext may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 68HC(S)08 technical data for valid
modes.
AK.3.1 Control Instructions
clc cli daa div
mul nop nsa psha
pshh pshx pula pulh
pulx rsp rti rts
sec sei stop swi
tap tax tpa tsx
txa txs wait
AK.3.2 Bit Manipulation Instructions
brset #data,*dir,label
brclr #data,*dir,label
bset #data,*dir
bclr #data,*dir
AK.3.3 Branch Instructions
bra label brn label
bhi label bls label
bcc label bcs label
bne label beq label
bhcc label bhcs label
bpl label bmi label
bmc label bms label
bil label bih label
bsr label bge label
blt label bgt label
ble label
AS68(HC[S])08 ASSEMBLER PAGE AK-5
68HC(S)08 INSTRUCTION SET
AK.3.4 Complex Branch Instructions
cbeqa [],label
cbeqx [],label
cbeq [],label
dbnza label
dbnzx label
dbnz [],label
AK.3.5 Read-Modify-Write Instructions
nega negx
neg []
coma comx
com []
lsra lsrx
lsr []
rora rorx
ror []
asra asrx
asr []
asla aslx
asl []
lsla lslx
lsl []
rola rolx
rol []
deca decx
dec []
inca incx
inc []
tsta tstx
tst []
clra clrx
clr [] clrh
aix #data
ais #data
AS68(HC[S])08 ASSEMBLER PAGE AK-6
68HC(S)08 INSTRUCTION SET
AK.3.6 Register\Memory Instructions
sub [] cmp []
sbc [] cpx []
and [] bit []
lda [] sta []
eor [] adc []
ora [] add []
ldx [] stx []
AK.3.7 Double Operand Move Instruction
mov [],[]
AK.3.8 16-Bit <H:X> Index Register Instructions
cphx []
ldhx []
sthx []
AK.3.9 Jump and Jump to Subroutine Instructions
jmp [] jsr []
APPENDIX AR
AS8051 ASSEMBLER
AR.1 ACKNOWLEDGMENT
Thanks to John Hartman for his contribution of the AS8051
cross assembler.
John L. Hartman
jhartman at compuserve dot com
noice at noicedebugger dot com
AR.2 8051 REGISTER SET
The following is a list of the 8051 registers used by AS8051:
a,b - 8-bit accumulators
r0,r1,r2,r3 - 8-bit registers
r4,r5,r6,r7
dptr - data pointer
sp - stack pointer
pc - program counter
psw - status word
c - carry (bit in status word)
AS8051 ASSEMBLER PAGE AR-2
8051 REGISTER SET
AR.3 8051 INSTRUCTION SET
The following tables list all 8051 mnemonics recognized by
the AS8051 assembler. The following list specifies the format
for each addressing mode supported by AS8051:
#data immediate data
byte or word data
r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
@r indirect on register r0 or r1
@dptr indirect on data pointer
@a+dptr indirect on accumulator
plus data pointer
@a+pc indirect on accumulator
plus program counter
addr direct memory address
bitaddr bit address
label call or jump label
The terms data, addr, bitaddr, and label may all be expressions.
Note that not all addressing modes are valid with every in-
struction. Refer to the 8051 technical data for valid modes.
AR.3.1 Inherent Instructions
nop
AS8051 ASSEMBLER PAGE AR-3
8051 INSTRUCTION SET
AR.3.2 Move Instructions
mov a,#data mov a,addr
mov a,r mov a,@r
mov r,#data mov r,addr
mov r,a
mov addr,a mov addr,#data
mov addr,r mov addr,@r
mov addr1,addr2 mov bitaddr,c
mov @r,#data mov @r,addr
mov @r,a
mov c,bitaddr
mov dptr,#data
movc a,@a+dptr movc a,@a+pc
movx a,@dptr movx a,@r
movx @dptr,a movx @r,a
AR.3.3 Single Operand Instructions
clr a clr c
clr bitaddr
cpl a cpl c
cpl bitaddr
setb c setb bitaddr
da a
rr a rrc a
rl a rlc a
swap a
dec a dec r
dec @r
inc a inc r
inc dptr inc @r
div ab mul ab
pop addr push addr
AS8051 ASSEMBLER PAGE AR-4
8051 INSTRUCTION SET
AR.3.4 Two Operand Instructions
add a,#data add a,addr
add a,r add a,@r
addc a,#data addc a,addr
addc a,r addc a,@r
subb a,#data subb a,addr
subb a,r subb a,@r
orl a,#data orl a,addr
orl a,r orl a,@r
orl addr,a orl addr,#data
orl c,bitaddr orl c,/bitaddr
anl a,#data anl a,addr
anl a,r anl a,@r
anl addr,a anl addr,#data
anl c,bitaddr anl c,/bitaddr
xrl a,#data xrl a,addr
xrl a,r xrl a,@r
xrl addr,a xrl addr,#data
xrl c,bitaddr xrl c,/bitaddr
xch a,addr xch a,r
xch a,@r xchd a,@r
AR.3.5 Call and Return Instructions
acall label lcall label
ret reti
in data
out data
rst data
AR.3.6 Jump Instructions
ajmp label
cjne a,#data,label cjne a,addr,label
cjne r,#data,label cjne @r,#data,label
djnz r,label djnz addr,label
jbc bitadr,label
jb bitadr,label jnb bitadr,label
jc label jnc label
jz label jnz label
jmp @a+dptr
ljmp label sjmp label
AS8051 ASSEMBLER PAGE AR-5
8051 INSTRUCTION SET
AR.3.7 Predefined Symbols: SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
FC FF
F8 FB
F4 F7
F0 B F3
EC EF
E8 EB
E4 E7
E0 ACC E3
DC DF
D8 DB
D4 D7
D0 PSW D3
CC [ TL2 TH2 ] CF
C8 [ T2CON RCAP2L RCAP2H ] CB
C4 C7
C0 C3
BC BF
B8 IP BB
B4 B7
B0 P3 B3
AC AF
A8 IE AB
A4 A7
A0 P2 A3
9C 9F
98 SCON SBUF 9B
94 97
90 P1 93
8C TH0 TH1 8F
88 TCON TMOD TL0 TL1 8B
84 PCON 87
80 P0 SP DPL DPH 83
[...] Indicates Resident in 8052, not 8051
A is an allowed alternate for ACC.
AS8051 ASSEMBLER PAGE AR-6
8051 INSTRUCTION SET
AR.3.8 Predefined Symbols: SFR Bit Addresses
---------- 4 BITS ----------
---- ---- ---- ----
FC FF
F8 FB
F4 B.4 B.5 B.6 B.7 F7
F0 B.0 B.1 B.2 B.3 F3
EC EF
E8 EB
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
DC DF
D8 DB
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CF
C8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CB
C4 C7
C0 C3
BC IP.4 IP.5 IP.6 IP.7 BF
B8 IP.0 IP.1 IP.2 IP.3 BB
B4 P3.4 P3.5 P3.6 P3.7 B7
B0 P3.0 P3.1 P3.2 P3.3 B3
AC IE.4 IE.5 EI.6 IE.7 AF
A8 IE.0 IE.1 IE.2 IE.3 AB
A4 P2.4 P2.5 P2.6 P2.7 A7
A0 P2.0 P2.1 P2.2 P2.3 A3
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
98 SCON.0 SCON.1 SCON.2 SCON.3 9B
94 P1.4 P1.5 P1.6 P1.7 97
90 P1.0 P1.1 P1.2 P1.3 93
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
88 TCON.0 TCON.1 TCON.2 TCON.3 8B
84 P0.4 P0.5 P0.6 P0.7 87
80 P0.0 P0.1 P0.2 P0.3 83
[...] Indicates Resident in 8052, not 8051
A is an allowed alternate for ACC.
AS8051 ASSEMBLER PAGE AR-7
8051 INSTRUCTION SET
AR.3.9 Predefined Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
FC FF
F8 FB
F4 F7
F0 F3
EC EF
E8 EB
E4 E7
E0 E3
DC DF
D8 DB
D4 RS1 F0 AC CY D7
D0 P OV RS0 D3
CC [ TLCK RCLK EXF2 TF2 ] CF
C8 [ CPRL2 CT2 TR2 EXEN2 ] CB
C4 C7
C0 C3
BC PS PT2 BF
B8 PX0 PT0 PX1 PT1 BB
B4 B7
B0 RXD TXD INT0 INT1 B3
AC ES ET2 EA AF
A8 EX0 ET0 EX1 ET1 AB
A4 A7
A0 A3
9C REN SM2 SM1 SM0 9F
98 RI TI RB8 TB8 9B
94 97
90 93
8C TR0 TF0 TR1 TF1 8F
88 IT0 IE0 IT1 IE1 8B
84 87
80 83
[...] Indicates Resident in 8052, not 8051
APPENDIX AT
AS8XCXXX ASSEMBLER
AT.1 ACKNOWLEDGMENTS
Thanks to Bill McKinnon for his contributions to the AS8XCXXX
cross assembler.
Bill McKinnon
w_mckinnon at conknet dot com
This assembler was derived from the AS8051 cross assembler
contributed by John Hartman.
John L. Hartman
jhartman at compuserve dot com
noice at noicedebugger dot com
AT.2 AS8XCXXX ASSEMBLER DIRECTIVES
AT.2.1 Processor Selection Directives
The AS8XCXXX assembler contains directives to specify the
processor core SFR (Special Function Registers) and enable the
SFR Bit Register values during the assembly process. The fol-
lowing directives are supported:
.DS8XCXXX ;80C32 core
.DS80C310 ;Dallas Semiconductor
.DS80C320 ;Microprocessors
.DS80C323
.DS80C390
.DS83C520
.DS83C530
AS8XCXXX ASSEMBLER PAGE AT-2
AS8XCXXX ASSEMBLER DIRECTIVES
.DS83C550
.DS87C520
.DS87C530
.DS87C550
The invocation of one of the processor directives creates a pro-
cessor specific symbol and an SFR-Bits symbol. For example the
directive
.DS80C390
creates the global symbols '__DS80C390' and '__SFR_BITS' each
with a value of 1. If the microprocessor core selection direc-
tive is followed by an optional argument then the symbol
'__SFR_BITS' is given the value of the argument. The file
DS8XCXXX.SFR contains the SFR and SFR register bit values for
all the microprocessor selector directives. This file may be
modified to create a new SFR for other microprocessor types.
If a microprocessor selection directive is not specified then
no processor symbols will be defined. This mode allows the SFR
and SFR register bit values to be defined by the assembly source
file.
AT.2.2 .cpu Directive
The .cpu directive is similar to the processor selection
directives. This directive defines a new processor type and
creates a user defined symbol:
.cpu "CP84C331" 2
creates the symbol '__CP84C331' with a value of 1 and the
symbol '__SFR_BITS' with a value of 2. These values can be used
to select the processor SFR and SFR register bits from an in-
clude file. If the optional final argument, 2, is omitted then
the value of the symbol '__SFR_BITS' is 1.
AS8XCXXX ASSEMBLER PAGE AT-3
AS8XCXXX ASSEMBLER DIRECTIVES
AT.2.3 Processor Addressing Range Directives
If one of the .DS8... microprocessor selection directives is
not specified then the following address range assembler direc-
tives are accepted:
.16bit ;16-Bit Addressing
.24bit ;24-Bit Addressing
.32bit ;32-Bit Addressing
These directives specify the assembler addressing space and ef-
fect the output format for the .lst, .sym, and .rel files.
The default addressing space for defined microprocessors is
16-Bit except for the DS80C390 microprocessor which is 24-Bit.
The .cpu directive defaults to the 16-Bit addressing range
but this can be changed using these directives.
AT.2.4 The .__.CPU. Variable
The value of the pre-defined symbol '.__.CPU.' corresponds to
the selected processor type. The default value is 0 which cor-
responds to the default processor type. The following table
lists the processor types and associated values for the AS8XCXXX
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.cpu 0
.DS8XCXXX 1
.DS80C310 2
.DS80C320 3
.DS80C323 4
.DS80C390 5
.DS83C520 6
.DS83C530 7
.DS83C550 8
.DS87C520 9
.DS87C530 10
.DS87C550 11
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
AS8XCXXX ASSEMBLER PAGE AT-4
AS8XCXXX ASSEMBLER DIRECTIVES
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that seperately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
AT.2.5 DS80C390 Addressing Mode Directive
The DS80C390 microprocessor supports 16-Bit and 24-Bit ad-
dressing modes. The .amode assembler directive provides a
method to select the addressing mode used by the ajmp, acall,
ljmp, and lcall instructions. These four instructions support
16 and 24 bit addressing modes selected by bits AM0 and AM1 in
the ACON register. The assembler is 'informed' about the ad-
dressing mode selected by using the .amode directive:
.amode 2 ;mode 2 is 24-bit addressing
If a second argument is specified and its value is non-zero,
then a three instruction sequence is inserted at the .amode lo-
cation loading the mode bits into the ACON register:
.amode 2,1 ;mode 2 is 24-bit addressing, load ACON
;mov ta,#0xAA
;mov ta,#0x55
;mov acon,#amode
AT.2.6 The .msb Directive
The .msb directive is available in the AS8XCXXX assembler.
The assembler operator '>' selects the upper byte (MSB) when
included in an assembler instruction. The default assembler
mode is to select bits <15:8> as the MSB. The .msb directive
allows the programmer to specify a particular byte as the 'MSB'
when the address space is larger than 16-bits.
The assembler directive .msb n configures the assembler to
select a particular byte as MSB. Given a 24-bit address of Nmn
(N(2) is <23:16>, m(1) is <15:8>, and n(0) is <7:0>) the follow-
ing examples show how to select a particular address byte:
.msb 1 ;select byte 1 of address
;<M(3):N(2):m(1):n(0)>
LD A,>MNmn ;byte m <15:8> ==>> A
AS8XCXXX ASSEMBLER PAGE AT-5
AS8XCXXX ASSEMBLER DIRECTIVES
...
.msb 2 ;select byte 2 of address
;<M(3):N(2):m(1):n(0)>
LD A,>MNmn ;byte N <23:16> ==>> A
...
AS8XCXXX ASSEMBLER PAGE AT-6
AS8XCXXX ASSEMBLER DIRECTIVES
AT.3 DS8XCXXX REGISTER SET
The AS8XCXXX cross assembler supports the Dallas Semiconductor
DS8XCXXX series of 8051-compatible devices. These microproces-
sors retain instruction set and object code compatability with
the 8051 microprocessor. The DS8XCXXX family is updated with
several new peripherals while providing all the standard
features of the 80C32 microprocessor.
The following is a list of the registers used by AS8XCXXX:
a,b - 8-bit accumulators
r0,r1,r2,r3 - 8-bit registers
r4,r5,r6,r7
dptr - data pointer
sp - stack pointer
pc - program counter
psw - status word
c - carry (bit in status word)
AT.4 DS8XCXXX INSTRUCTION SET
The following tables list all DS8XCXXX mnemonics recognized
by the AS8XCXXX assembler. The following list specifies the
format for each addressing mode supported by AS8XCXXX:
#data immediate data
byte or word data
r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
@r indirect on register r0 or r1
@dptr indirect on data pointer
@a+dptr indirect on accumulator
plus data pointer
@a+pc indirect on accumulator
plus program counter
addr direct memory address
bitaddr bit address
label call or jump label
The terms data, addr, bitaddr, and label may all be expressions.
Note that not all addressing modes are valid with every in-
struction. Refer to the DS8XCXXX technical data for valid
modes.
AS8XCXXX ASSEMBLER PAGE AT-7
DS8XCXXX INSTRUCTION SET
AT.4.1 Inherent Instructions
nop
AT.4.2 Move Instructions
mov a,#data mov a,addr
mov a,r mov a,@r
mov r,#data mov r,addr
mov r,a
mov addr,a mov addr,#data
mov addr,r mov addr,@r
mov addr1,addr2 mov bitaddr,c
mov @r,#data mov @r,addr
mov @r,a
mov c,bitaddr
mov dptr,#data
movc a,@a+dptr movc a,@a+pc
movx a,@dptr movx a,@r
movx @dptr,a movx @r,a
AT.4.3 Single Operand Instructions
clr a clr c
clr bitaddr
cpl a cpl c
cpl bitaddr
setb c setb bitaddr
da a
rr a rrc a
rl a rlc a
swap a
dec a dec r
dec @r
inc a inc r
inc dptr inc @r
div ab mul ab
pop addr push addr
AS8XCXXX ASSEMBLER PAGE AT-8
DS8XCXXX INSTRUCTION SET
AT.4.4 Two Operand Instructions
add a,#data add a,addr
add a,r add a,@r
addc a,#data addc a,addr
addc a,r addc a,@r
subb a,#data subb a,addr
subb a,r subb a,@r
orl a,#data orl a,addr
orl a,r orl a,@r
orl addr,a orl addr,#data
orl c,bitaddr orl c,/bitaddr
anl a,#data anl a,addr
anl a,r anl a,@r
anl addr,a anl addr,#data
anl c,bitaddr anl c,/bitaddr
xrl a,#data xrl a,addr
xrl a,r xrl a,@r
xrl addr,a xrl addr,#data
xrl c,bitaddr xrl c,/bitaddr
xch a,addr xch a,r
xch a,@r xchd a,@r
AT.4.5 Call and Return Instructions
acall label lcall label
ret reti
in data
out data
rst data
AT.4.6 Jump Instructions
ajmp label
cjne a,#data,label cjne a,addr,label
cjne r,#data,label cjne @r,#data,label
djnz r,label djnz addr,label
jbc bitadr,label
jb bitadr,label jnb bitadr,label
jc label jnc label
jz label jnz label
jmp @a+dptr
ljmp label sjmp label
AS8XCXXX ASSEMBLER PAGE AT-9
DS8XCXXX INSTRUCTION SET
AT.5 DS8XCXXX SPECIAL FUNCTION REGISTERS
The 80C32 core Special Function Registers are selected using
the .DS8XCXXX assembler directive.
AT.5.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 SP DPL DPH 83
84 PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 8F
90 P1 93
94 97
98 SCON SBUF 9B
9C 9F
A0 P2 A3
A4 A7
A8 IE SADDR0 AB
AC AF
B0 P3 B3
B4 B7
B8 IP SADEN0 BB
BC BF
C0 C3
C4 STATUS C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 CF
D0 PSW D3
D4 D7
D8 DB
DC DF
E0 ACC E3
E4 E7
E8 EB
EC EF
F0 B F3
F4 F7
F8 FB
FC FF
AS8XCXXX ASSEMBLER PAGE AT-10
DS8XCXXX SPECIAL FUNCTION REGISTERS
AT.5.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
P1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
C0 C3
C4 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
D8 DB
DC DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
E8 EB
EC EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
F8 FB
FC FF
AS8XCXXX ASSEMBLER PAGE AT-11
DS8XCXXX SPECIAL FUNCTION REGISTERS
AT.5.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 BF
C0 C3
C4 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
D8 DB
DC DF
E0 E3
E4 E7
E8 EB
EC EF
F0 F3
F4 F7
F8 FB
FC FF
Alternates:
SCON 98 9B
9C FE 9F
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-12
DS8XCXXX SPECIAL FUNCTION REGISTERS
AT.5.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
PCON 0x80 SMOD SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
STATUS 0x80 HIP LIP 0x10
0x08 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
AS8XCXXX ASSEMBLER PAGE AT-13
DS8XCXXX SPECIAL FUNCTION REGISTERS
AT.6 DS80C310 SPECIAL FUNCTION REGISTERS
The DS80C310 Special Function Registers are selected using
the .DS80C310 assembler directive.
AT.6.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 P1 EXIF 93
94 97
98 SCON SBUF 9B
9C 9F
A0 P2 A3
A4 A7
A8 IE SADDR0 AB
AC AF
B0 P3 B3
B4 B7
B8 IP SADEN0 BB
BC BF
C0 C3
C4 STATUS C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 CF
D0 PSW D3
D4 D7
D8 WDCON DB
DC DF
E0 ACC E3
E4 E7
E8 EIE EB
EC EF
F0 B F3
F4 F7
F8 EIP FB
FC FF
AS8XCXXX ASSEMBLER PAGE AT-14
DS80C310 SPECIAL FUNCTION REGISTERS
AT.6.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
P1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
C0 C3
C4 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
AS8XCXXX ASSEMBLER PAGE AT-15
DS80C310 SPECIAL FUNCTION REGISTERS
AT.6.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 BF
C0 C3
C4 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
WDCON D8 DB
DC POR DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC FF
Alternates:
SCON 98 9B
9C FE 9F
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-16
DS80C310 SPECIAL FUNCTION REGISTERS
AT.6.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 0x10
0x08 SEL 0x01
PCON 0x80 SMOD SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
EXIF 0x80 IE5 IE4 IE3 IE2 0x10
0x08 0x01
STATUS 0x80 HIP LIP 0x10
0x08 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
Alternates:
PCON 0x80 SMOD_0 0x10
0x08 0x01
AS8XCXXX ASSEMBLER PAGE AT-17
DS80C310 SPECIAL FUNCTION REGISTERS
AT.7 DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
The DS80C320/DS80C323 Special Function Registers are selected
using the .DS80C320 or DS80C323 assembler directives.
AT.7.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 P1 EXIF 93
94 97
98 SCON0 SBUF0 9B
9C 9F
A0 P2 A3
A4 A7
A8 IE SADDR0 AB
AC AF
B0 P3 B3
B4 B7
B8 IP SADEN0 BB
BC BF
C0 SCON1 SBUF1 C3
C4 STATUS TA C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 CF
D0 PSW D3
D4 D7
D8 WDCON DB
DC DF
E0 ACC E3
E4 E7
E8 EIE EB
EC EF
F0 B F3
F4 F7
F8 EIP FB
FC FF
Alternates:
98 SCON SBUF 9B
AS8XCXXX ASSEMBLER PAGE AT-18
DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
AT.7.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
P1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
Alternates:
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
AS8XCXXX ASSEMBLER PAGE AT-19
DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
AT.7.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
9C REN_0 SM2_0 SM1_0 SMO_0 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 BF
SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
C4 REN_1 SM2_1 SM1_1 SMO_1 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
WDCON D8 RWT EWT WTRF WDIF DB
DC PFI EPFI POR SMOD_1 DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC EWDI EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC PWDI FF
Alternates:
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
SCON 98 9B
9C FE 9F
SCON0 98 9B
9C FE_0 9F
SCON1 C0 C3
C4 FE_1 C7
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-20
DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
AT.7.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 0x10
0x08 SEL 0x01
PCON 0x80 SMOD_0 SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 WD1 WD0 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
EXIF 0x80 IE5 IE4 IE3 IE2 0x10
0x08 RGMD RGSL BGS 0x01
STATUS 0x80 PIP HIP LIP 0x10
0x08 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
Alternates:
PCON 0x80 SMOD 0x10
0x08 0x01
AS8XCXXX ASSEMBLER PAGE AT-21
DS80C320/DS80C323 SPECIAL FUNCTION REGISTERS
AT.8 DS80C390 SPECIAL FUNCTION REGISTERS
The DS80C390 Special Function Registers are selected using
the .DS80C390 assembler directive.
AT.8.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 P4 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 P1 EXIF P4CNT DPX 93
94 DPX1 C0RMS0 C0RMS1 97
98 SCON0 SBUF0 ESP 9B
9C AP ACON C0TMA0 C0TMA1 9F
A0 P2 P5 P5CNT C0C A3
A4 C0S C0IR C0TE C0RE A7
A8 IE SADDR0 SADDR1 C0M1C AB
AC C0M2C C0M3C C0M4C C0M5C AF
B0 P3 C0M6C B3
B4 C0M7C C0M8C C0M9C C0M10C B7
B8 IP SADEN0 SADEN1 C0M11C BB
BC C0M12C C0M13C C0M14C C0M15C BF
C0 SCON1 SBUF1 C3
C4 PMR STATUS MCON TA C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 COR CF
D0 PSW MCNT0 MCNT1 MA D3
D4 MB MC C1RMS0 C1RMS1 D7
D8 WDCON DB
DC C1TMA0 C1TMA1 DF
E0 ACC C1C E3
E4 C1S C1IR C1TE C1RE E7
E8 EIE MXAX C1M1C EB
EC C1M2C C1M3C C1M4C C1M5C EF
F0 B C1M6C F3
F4 C1M7C C1M8C C1M9C C1M10C F7
F8 EIP C1M11C FB
FC C1M12C C1M13C C1M14C C1M15C FF
Alternates:
98 SCON SBUF 9B
AS8XCXXX ASSEMBLER PAGE AT-22
DS80C390 SPECIAL FUNCTION REGISTERS
AT.8.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
P4 80 P4.0 P4.1 P4.2 P4.3 83
84 P4.4 P4.5 P4.6 P4.7 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
P1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
Alternates:
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
AS8XCXXX ASSEMBLER PAGE AT-23
DS80C390 SPECIAL FUNCTION REGISTERS
AT.8.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
P1 90 T2 T2EX RXD1 TXD1 93
94 INT2 INT3 INT4 INT5 97
SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
9C REN_0 SM2_0 SM1_0 SMO_0 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 ES1 EA AF
P3 B0 RXD0 TXD0 INT0 INT1 B3
B4 T0 T1 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 PS1 BF
SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
C4 REN_1 SM2_1 SM1_1 SMO_1 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
WDCON D8 RWT EWT WTRF WDIF DB
DC PFI EPFI POR SMOD_1 DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC EWDI C1IE C0IE CANBIE EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC PWDI C1IP C0IP CANBIP FF
Alternates:
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
SCON 98 9B
9C FE 9F
SCON0 98 9B
9C FE_0 9F
SCON1 C0 C3
C4 FE_1 C7
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-24
DS80C390 SPECIAL FUNCTION REGISTERS
AT.8.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 ID1 ID0 TSL 0x10
0x08 SEL 0x01
PCON 0x80 SMOD_0 SMOD0 OFDF OFDE 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 WD1 WD0 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
EXIF 0x80 IE5 IE4 IE3 IE2 0x10
0x08 CKRY RGMD RGSL BGS 0x01
P4CNT 0x80 SBCAN 0x10
0x08 0x01
ESP 0x80 0x10
0x08 ESP.1 ESP.0 0x01
ACON 0x80 0x10
0x08 SA AM1 AM0 0x01
P5 0x80 P5.7 P5.6 P5.5 P5.4 0x10
0x08 P5.3 P5.2 P5.1 P5.0 0x01
P5CNT 0x80 CAN1BA CAN0BA SP1EC C1_IO 0x10
0x08 C0_IO P5CNT.2 P5CNT.1 P5CNT.0 0x01
CxC 0x80 ERIE STIE PDE SIESTA 0x10
0x08 CRST AUTOB ERCS SWINT 0x01
CxS 0x80 BSS EC96_128 WKS RXS 0x10
0x08 TXS ER2 ER1 ER0 0x01
CxIR 0x80 INTIN7 INTIN6 INTIN5 INTIN4 0x10
0x08 INTIN3 INTIN2 INTIN1 INTIN0 0x01
CxCxxC 0x80 MSRDY ET1 ER1 INTRQ 0x10
0x08 EXTRQ MTRQ ROW_TIH DTUP 0x01
PMR 0x80 CD1 CD0 SWB CTM 0x10
0x08 4X_2X ALEOFF 0x01
STATUS 0x80 PIP HIP LIP 0x10
0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
MCON 0x80 IDM1 IDM0 CMA 0x10
0x08 PDCE3 PDCE2 PDCE1 PDCE0 0x01
T2MOD 0x80 D13T1 0x10
0x08 D13T2 T2OE DCEN 0x01
COR 0x80 IRDACK C1BPR7 C1BPR6 C0BPR7 0x10
0x08 C0BPR6 COD1 COD0 CLKOE 0x01
MCNT0 0x80 _LSHIFT CSE SCB MAS4 0x10
0x08 MAS3 MAS2 MAS1 MAS0 0x01
MCNT1 0x80 MST MOF CLM 0x10
0x08 0x01
Alternates:
AS8XCXXX ASSEMBLER PAGE AT-25
DS80C390 SPECIAL FUNCTION REGISTERS
PCON 0x80 SMOD 0x10
0x08 0x01
AS8XCXXX ASSEMBLER PAGE AT-26
DS80C390 SPECIAL FUNCTION REGISTERS
AT.9 DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
The DS83C520/DS87C520 Special Function Registers are selected
using the .DS83C520 or DS87C520 assembler directives.
AT.9.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 P0 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 PORT1 EXIF 93
94 97
98 SCON0 SBUF0 9B
9C 9F
A0 P2 A3
A4 A7
A8 IE SADDR0 SADDR1 AB
AC AF
B0 P3 B3
B4 B7
B8 IP SADEN0 SADEN1 BB
BC BF
C0 SCON1 SBUF1 ROMSIZE C3
C4 PMR STATUS TA C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 CF
D0 PSW D3
D4 D7
D8 WDCON DB
DC DF
E0 ACC E3
E4 E7
E8 EIE EB
EC EF
F0 B F3
F4 F7
F8 EIP FB
FC FF
Alternates:
98 SCON SBUF 9B
AS8XCXXX ASSEMBLER PAGE AT-27
DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
AT.9.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
P0 80 P0.7 P0.6 P0.5 P0.4 83
84 P0.3 P0.2 P0.1 P0.0 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
PORT1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
Alternates:
PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 93
94 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
AS8XCXXX ASSEMBLER PAGE AT-28
DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
AT.9.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
9C REN_0 SM2_0 SM1_0 SMO_0 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 ES1 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 PS1 BF
SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
C4 REN_1 SM2_1 SM1_1 SMO_1 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
WDCON D8 RWT EWT WTRF WDIF DB
DC PFI EPFI POR SMOD_1 DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC EWDI EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC PWDI FF
Alternates:
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
SCON 98 9B
9C FE 9F
SCON0 98 9B
9C FE_0 9F
SCON1 C0 C3
C4 FE_1 C7
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-29
DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
AT.9.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 0x10
0x08 SEL 0x01
PCON 0x80 SMOD_0 SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 WD1 WD0 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
EXIF 0x80 IE5 IE4 IE3 IE 0x10
0x08 XT_RG RGMD RGSL BGS 0x01
SBUF1 0x80 SB7 SB6 SB5 SB4 0x10
0x08 SB3 SB2 SB1 SB0 0x01
ROMSIZE 0x80 0x10
0x08 RMS2 RMS1 RMS0 0x01
PMR 0x80 CD1 CD0 SWB 0x10
0x08 XTOFF ALEOFF DME1 DME0 0x01
STATUS 0x80 PIP HIP LIP XTUP 0x10
0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
Alternates:
PCON 0x80 SMOD 0x10
0x08 0x01
AS8XCXXX ASSEMBLER PAGE AT-30
DS83C520/DS87C520 SPECIAL FUNCTION REGISTERS
AT.10 DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
The DS83C530/DS87C530 Special Function Registers are selected
using the .DS83C530 or DS87C530 assembler directives.
AT.10.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 P0 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 P1 EXIF 93
94 TRIM 97
98 SCON0 SBUF0 9B
9C 9F
A0 P2 A3
A4 A7
A8 IE SADDR0 SADDR1 AB
AC AF
B0 P3 B3
B4 B7
B8 IP SADEN0 SADEN1 BB
BC BF
C0 SCON1 SBUF1 ROMSIZE C3
C4 PMR STATUS TA C7
C8 T2CON T2MOD RCAP2L RCAP2H CB
CC TL2 TH2 CF
D0 PSW D3
D4 D7
D8 WDCON DB
DC DF
E0 ACC E3
E4 E7
E8 EIE EB
EC EF
F0 B RTASS RTAS F3
F4 RTAM RTAH F7
F8 EIP RTCC RTCSS RTCS FB
FC RTCM RTCH RTCD0 RTCD1 FF
Alternates:
98 SCON SBUF 9B
AS8XCXXX ASSEMBLER PAGE AT-31
DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
AT.10.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
P0 80 P0.7 P0.6 P0.5 P0.4 83
84 P0.3 P0.2 P0.1 P0.0 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
P1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
P2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
P3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
SCON1 C0 SCON1.0 SCON1.1 SCON1.2 SCON1.3 C3
C4 SCON1.4 SCON1.5 SCON1.6 SCON1.7 C7
T2CON C8 T2CON.0 T2CON.1 T2CON.2 T2CON.3 CB
CC T2CON.4 T2CON.5 T2CON.6 T2CON.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
WDCON D8 WDCON.0 WDCON.1 WDCON.2 WDCON.3 DB
DC WDCON.4 WDCON.5 WDCON.6 WDCON.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
Alternates:
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
AS8XCXXX ASSEMBLER PAGE AT-32
DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
AT.10.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
9C REN_0 SM2_0 SM1_0 SMO_0 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 ES1 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PT2 PS1 BF
SCON1 C0 RI_1 TI_1 RB8_1 TB8_1 C3
C4 REN_1 SM2_1 SM1_1 SMO_1 C7
T2CON C8 CPRL2 CT2 TR2 EXEN2 CB
CC TCLK RCLK EXF2 TF2 CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
WDCON D8 RWT EWT WTRF WDIF DB
DC PFI EPFI POR SMOD_1 DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC EWDI ERTCI EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC PWDI PRTCI FF
Alternates:
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
SCON 98 9B
9C FE 9F
SCON0 98 9B
9C FE_0 9F
SCON1 C0 C3
C4 FE_1 C7
T2CON C8 CP_RL2 C_T2 CB
CC CF
AS8XCXXX ASSEMBLER PAGE AT-33
DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
AT.10.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 0x10
0x08 SEL 0x01
PCON 0x80 SMOD_0 SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 WD1 WD0 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
EXIF 0x80 IE5 IE4 IE3 IE 0x10
0x08 XT_RG RGMD RGSL BGS 0x01
TRIM 0x80 E4K X12_6 TRM2 _TRM2 0x10
0x08 TRM1 _TRM1 TRM0 _TRM0 0x01
SBUF1 0x80 SB7 SB6 SB5 SB4 0x10
0x08 SB3 SB2 SB1 SB0 0x01
ROMSIZE 0x80 0x10
0x08 RMS2 RMS1 RMS0 0x01
PMR 0x80 CD1 CD0 SWB 0x10
0x08 XTOFF ALEOFF DME1 DME0 0x01
STATUS 0x80 PIP HIP LIP XTUP 0x10
0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
RTCC 0x80 SSCE SCE MCE HCE 0x10
0x08 RTCRE RTCWE RTCIF RTCE 0x01
Alternates:
PCON 0x80 SMOD 0x10
0x08 0x01
AS8XCXXX ASSEMBLER PAGE AT-34
DS83C530/DS87C530 SPECIAL FUNCTION REGISTERS
AT.11 DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
The DS83C550/DS87C550 Special Function Registers are selected
using the .DS83C550 or DS87C550 assembler directives.
AT.11.1 SFR Map
--------- 4 Bytes ----------
---- ---- ---- ----
80 PORT0 SP DPL DPH 83
84 DPL1 DPH1 DPS PCON 87
88 TCON TMOD TL0 TL1 8B
8C TH0 TH1 CKCON 8F
90 PORT1 RCON 93
94 97
98 SCON0 SBUF0 9B
9C PMR 9F
A0 PORT2 SADDR0 SADDR1 A3
A4 A7
A8 IE CMPL0 CMPL1 CMPL2 AB
AC CPTL0 CPTL1 CPTL2 CPTL3 AF
B0 PORT3 ADCON1 ADCON2 B3
B4 ADMSB ADLSD WINHI WINLO B7
B8 IP SADEN0 SADEN1 BB
BC T2CON T2MOD BF
C0 PORT4 ROMSIZE C3
C4 PORT5 STATUS TA C7
C8 T2IR CMPH0 CMPH1 CMPH2 CB
CC CPTH0 CPTH1 CPTH2 CPTH3 CF
D0 PSW PW0FG PW1FG D3
D4 PW2FG PW3FG PWMADR D7
D8 SCON1 SBUF1 DB
DC PWM0 PWM1 PWM2 PWM3 DF
E0 ACC PW01CS PW23CS PW01CON E3
E4 PW23CON RLOADL RLOADH E7
E8 EIE T2SEL CTCON EB
EC TL2 TH2 SETR RSTR EF
F0 B PORT6 F3
F4 F7
F8 EIP FB
FC WDCON FF
Alternates:
80 P0 83
90 P1 93
98 SCON SBUF 9B
A0 P2 A3
B0 P3 B3
C0 P4 C3
AS8XCXXX ASSEMBLER PAGE AT-35
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
C4 P5 C7
F0 PORT6 F3
AS8XCXXX ASSEMBLER PAGE AT-36
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
AT.11.2 Bit Addressable Registers: Generic
---------- 4 BITS ----------
---- ---- ---- ----
PORT0 80 P0.7 P0.6 P0.5 P0.4 83
84 P0.3 P0.2 P0.1 P0.0 87
TCON 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
8C TCON.4 TCON.5 TCON.6 TCON.7 8F
PORT1 90 P1.0 P1.1 P1.2 P1.3 93
94 P1.4 P1.5 P1.6 P1.7 97
SCON0 98 SCON0.0 SCON0.1 SCON0.2 SCON0.3 9B
9C SCON0.4 SCON0.5 SCON0.6 SCON0.7 9F
PORT2 A0 P2.0 P2.1 P2.2 P2.3 A3
A4 P2.4 P2.5 P2.6 P2.7 A7
IE A8 IE.0 IE.1 IE.2 IE.3 AB
AC IE.4 IE.5 EI.6 IE.7 AF
PORT3 B0 P3.0 P3.1 P3.2 P3.3 B3
B4 P3.4 P3.5 P3.6 P3.7 B7
IP B8 IP.0 IP.1 IP.2 IP.3 BB
BC IP.4 IP.5 IP.6 IP.7 BF
PORT4 C0 P4.0 P4.1 P4.2 P4.3 C3
C4 P4.4 P4.5 P4.6 P4.7 C7
T2IR C8 T2IR.0 T2IR.1 T2IR.2 T2IR.3 CB
CC T2IR.4 T2IR.5 T2IR.6 T2IR.7 CF
PSW D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
SCON1 D8 SCON1.0 SCON1.1 SCON1.2 SCON1.3 DB
DC SCON1.4 SCON1.5 SCON1.6 SCON1.7 DF
ACC E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
EIE E8 EIE.0 EIE.1 EIE.2 EIE.3 EB
EC EIE.4 EIE.5 EIE.6 EIE.7 EF
B F0 B.0 B.1 B.2 B.3 F3
F4 B.4 B.5 B.6 B.7 F7
EIP F8 EIP.0 EIP.1 EIP.2 EIP.3 FB
FC EIP.4 EIP.5 EIP.6 EIP.7 FF
Alternates:
PORT0 80 PORT0.7 PORT0.6 PORT0.5 PORT0.4 83
84 PORT0.3 PORT0.2 PORT0.1 PORT0.0 87
PORT1 90 PORT1.0 PORT1.1 PORT1.2 PORT1.3 93
94 PORT1.4 PORT1.5 PORT1.6 PORT1.7 97
SCON 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
9C SCON.4 SCON.5 SCON.6 SCON.7 9F
PORT2 A0 PORT2.0 PORT2.1 PORT2.2 PORT2.3 A3
A4 PORT2.4 PORT2.5 PORT2.6 PORT2.7 A7
PORT3 B0 PORT3.0 PORT3.1 PORT3.2 PORT3.3 B3
B4 PORT3.4 PORT3.5 PORT3.6 PORT3.7 B7
PORT4 C0 PORT4.0 PORT4.1 PORT4.2 PORT4.3 C3
C4 PORT4.4 PORT4.5 PORT4.6 PORT4.7 C7
AS8XCXXX ASSEMBLER PAGE AT-37
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
AT.11.3 Bit Addressable Registers: Specific
---------- 4 BITS ----------
---- ---- ---- ----
80 83
84 87
TCON 88 IT0 IE0 IT1 IE1 8B
8C TR0 TF0 TR1 TF1 8F
90 93
94 97
SCON0 98 RI_0 TI_0 RB8_0 TB8_0 9B
9C REN_0 SM2_0 SM1_0 SMO_0 9F
A0 A3
A4 A7
IE A8 EX0 ET0 EX1 ET1 AB
AC ES0 ET2 ES1 EA AF
B0 B3
B4 B7
IP B8 PX0 PT0 PX1 PT1 BB
BC PS0 PS1 PAD BF
PORT4 C0 CMSR0 CMSR1 CMSR2 CMSR3 C3
C4 CMSR4 CMSR5 CMT0 CMT1 C7
T2IR C8 CF0 CF1 CF2 CF3 CB
CC CM0F CM1F CM2F CF
PSW D0 P FL OV RS0 D3
D4 RS1 F0 AC CY D7
SCON1 D8 RI_1 TI_1 RB8_1 TB8_1 DB
DC REN_1 SM2_1 SM1_1 SMO_1 DF
E0 E3
E4 E7
EIE E8 EX2 EX3 EX4 EX5 EB
EC ECM0 ECM1 ECM2 ET2 EF
F0 F3
F4 F7
EIP F8 PX2 PX3 PX4 PX5 FB
FC PCM0 PCM1 PCM2 PT2 FF
Alternates:
SCON 98 RI TI RB8 TB8 9B
9C REN SM2 SM1 SMO 9F
SCON 98 9B
9C FE 9F
SCON0 98 9B
9C FE_0 9F
T2IR C8 IE2 IE3 IE4 IE5 CB
CC CF
SCON1 D8 DB
DC FE_1 DF
EIE E8 EC0 EC1 EC2 EC3 EB
EC EF
EIP F8 PC0 PC1 PC2 PC3 FB
AS8XCXXX ASSEMBLER PAGE AT-38
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
FC FF
AS8XCXXX ASSEMBLER PAGE AT-39
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
AT.11.4 Optional Symbols: Control Bits
---------- 4 BITS ----------
---- ---- ---- ----
0x80 0x40 0x20 0x10
0x08 0x04 0x02 0x10
---- ---- ---- ----
DPS 0x80 ID1 ID0 TSL 0x10
0x08 SEL 0x01
PCON 0x80 SMOD_0 SMOD0 0x10
0x08 GF1 GF0 STOP IDLE 0x01
TMOD 0x80 T1GATE T1C_T T1M1 T1M0 0x10
0x08 T0GATE T0C_T T0M1 T0M0 0x01
CKCON 0x80 WD1 WD0 T2M T1M 0x10
0x08 T0M MD2 MD1 MD0 0x01
RCON 0x80 0x10
0x08 CKRDY RGMD RGSL BGS 0x01
PMR 0x80 CD1 CD0 SWB CTM 0x10
0x08 4X_2X ALEOFF DEM1 DEM0 0x01
ADCON1 0x80 STRT_BSY EOC CONT_SS ADEX 0x10
0x08 WCQ WCM ADON WCIO 0x01
ADCON2 0x80 OUTCF MUX2 MUX1 MUX0 0x10
0x08 APS3 APS2 APS1 APS0 0x01
T2CON 0x80 TF2 EXF2 RCLK TCLK 0x10
0x08 EXEN2 TR2 CT2 CPRL2 0x01
T2MOD 0x80 0x10
0x08 T2OE DCEN 0x01
PORT5 0x80 ADC7 ADC6 ADC5 ADC4 0x10
0x08 ADC3 ADC2 ADC1 ADC0 0x01
ROMSIZE 0x80 0x10
0x08 RMS2 RMS1 RMS0 0x01
STATUS 0x80 PIP HIP LIP XTUP 0x10
0x08 SPTA1 SPRA1 SPTA0 SPRA0 0x01
PWMADR 0x80 ADRS 0x10
0x08 PWE1 PWE0 0x01
PW01CS 0x80 PW0S2 PW0S1 PW0S0 PW0EN 0x10
0x08 PW1S2 PW1S1 PW1S0 PW1EN 0x01
PW23CS 0x80 PW2S2 PW2S1 PW2S0 PW2EN 0x10
0x08 PW3S2 PW3S1 PW3S0 PW3EN 0x01
PW01CON 0x80 PW0F PW0DC PW0OE PW0T_C 0x10
0x08 PW1F PW1DC PW1OE PW1T_C 0x01
PW23CON 0x80 PW2F PW2DC PW2OE PW2T_C 0x10
0x08 PW3F PW3DC PW3OE PW3T_C 0x01
T2SEL 0x80 TF2S TF2BS TF2B 0x10
0x08 T2P1 T2P0 0x01
CTCON 0x80 _CT3 CT3 _CT2 CT2 0x10
0x08 _CT1 CT1 _CT0 CT0 0x01
SETR 0x80 TGFF1 TGFF0 CMS5 CMS4 0x10
0x08 CMS3 CMS2 CMS1 CMS0 0x01
RSTR 0x80 CMTE1 CMTE0 CMR5 CMR4 0x10
0x08 CMR3 CMR2 CMR1 CMR0 0x01
PORT6 0x80 STADC PWMC1 PWMC0 0x10
AS8XCXXX ASSEMBLER PAGE AT-40
DS83C550/DS87C550 SPECIAL FUNCTION REGISTERS
0x08 PWMO3 PWMO2 PWMO1 PWMO0 0x01
WDCON 0x80 SMOD_1 POR EPF1 PF1 0x10
0x08 WDIF WTRF EWT RWT 0x01
Alternates:
PCON 0x80 SMOD 0x10
0x08 0x01
T2CON 0x80 0x10
0x08 C_T2 _RL2 0x01
APPENDIX AY
ASGB ASSEMBLER
AY.1 ACKNOWLEDGEMENT
Thanks to Roger Ivie for his contribution of the ASGB cross
assembler.
Roger Ivie
ivie at cc dot usu dot edu
AY.2 INTRODUCTION
The Gameboy uses an 8-bit processor which is closely related
to the 8080. It is usually described as a modified Z80, but may
be more closely understood as an enhanced 8080; it has the 8080
register set and many, but not all, enhanced Z80 instructions.
However, even this is not accurate, for the Gameboy also lacks
some basic 8080 instructions (most annoyingly SHLD and LHLD).
ASGB is based on ASZ80 and therefore uses the Z80 mnemonic set.
AY.3 GAMEBOY REGISTER SET AND CONDITIONS
The following is a complete list of register designations and
condition mnemonics:
byte registers - a,b,c,d,e,h,l
register pairs - af, bc, de, hl
word registers - pc, sp
C - carry bit set
NC - carry bit clear
NZ - zero bit clear
Z - zero bit set
ASGB ASSEMBLER PAGE AY-2
GAMEBOY INSTRUCTION SET
AY.4 GAMEBOY INSTRUCTION SET
The following tables list all Gameboy mnemnoics recognized by
the ASGB assembler. The designation [] refers to a required ad-
dressing mode argument. The following list specifies the format
for each addressing mode supported by ASGB:
#data immediate data
byte or word data
n byte value
rg a byte register
a,b,c,d,e,h,l
rp a register pair or 16-bit register
bc,de,hl
(hl) implied addressing or
register indirect addressing
(label) direct addressing
label call/jmp/jr label
The terms data, dir, and ext may all be expression. The term
dir is not allowed to be an external reference.
Note that not all addressing modes are valid with every in-
struction. Although official information is not, as far as I
know, publically available for the Gameboy processor, many unof-
ficial sources are available on the internet.
AY.4.1 .tile Directive
Format:
.tile /string/ or
.tile ^/string/
where: string is a string of ascii characters taken from the
set ' ', '.', '+', '*', '0', '1', '2', and '3'.
The string must be a multiple of eight
characters long.
ASGB ASSEMBLER PAGE AY-3
GAMEBOY INSTRUCTION SET
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .tile
directive will give the (q) error.
The Gameboy displays information on the screen using a pro-
grammable character set (referred to as "tiles" among Gameboy
developers). The ASGB cross assembler has a processor-specific
assembler directive to aid in the creation of the game's
character set.
Each character is created from an 8x8 grid of pixels, each
pixel of which is composed of two bits. The .tile directive ac-
cepts a single string argument which is processed to create the
byte values corresponding to the lines of pixels in the
character. The string argument must be some multiple of 8
characters long, and be one of these characters:
' ' or '0' - for the pixel value 00
'.' or '1' - for the pixel value 01
'+' or '2' - for the pixel value 10
'*' or '3' - for the pixel value 11
The .tile directive processes each 8-character group of its
string argument to create the two-byte value corresponding to
that line of pixels. The example in the popular extant litera-
ture could be done using ASGB like this:
0000 7C 7C 1 .tile " ***** "
0002 00 C6 2 .tile "++ ++ "
0004 C6 00 3 .tile ".. .. "
0006 00 FE 4 .tile "+++++++ "
0008 C6 C6 5 .tile "** ** "
000A 00 C6 6 .tile "++ ++ "
000C C6 00 7 .tile ".. .. "
000E 00 00 8 .tile " "
Or, using the synonym character set, as:
0010 7C 7C 10 .tile "03333300"
0012 00 C6 11 .tile "22000220"
0014 C6 00 12 .tile "11000110"
0016 00 FE 13 .tile "22222220"
0018 C6 C6 14 .tile "33000330"
001A 00 C6 15 .tile "22000220"
001C C6 00 16 .tile "11000110"
001E 00 00 17 .tile "00000000"
ASGB ASSEMBLER PAGE AY-4
GAMEBOY INSTRUCTION SET
Since .tile is perfectly willing to assemble multiple lines
of a character at once (as long as it is given complete rows of
pixels), it could even be done as:
.tile " ***** ++ ++ .. .. +++++++ "
.tile "** ** ++ ++ .. .. "
AY.4.2 Potentially Controversial Mnemonic Selection
Although the Gameboy processor is based on the Z80, it does
include some features which are not present in the Z80. The Z80
mnemonic set is not sufficient to describe these additional
operations; mnemonics must be created for the new operations.
The mnemonics ASGB uses are not the same as those used by other
publically-available Gameboy assemblers.
AY.4.2.1 Auto-Indexing Loads -
The Gameboy provides instructions to load or store the ac-
cumulator indirectly via HL and then subsequently increment or
decrement HL. ASGB uses the mnemonic 'ldd' for the instructions
which decrement HL and 'ldi' for the instructions which incre-
ment HL. Because the Gameboy lacks the Z80's block moves, the
mnemonics are not otherwise needed by ASGB.
ldd a,(hl) ldd (hl),a
ldi a,(hl) ldi (hl),a
AY.4.2.2 Input and Output Operations -
The Gameboy replaces the Z80's separate address space for
I/O with a mechanism similar to the zero page addressing of pro-
cessors such as the 6800 or 6502. All I/O registers in the
Gameboy reside in the address range between 0xff00 and 0xffff.
The Gameboy adds special instructions to load and store the ac-
cumulator from and into this page of memory. The instructions
are analogous to the Z80's in and out instructions and ASGB re-
tains the 'in' and 'out' mnemonics for them.
in a,(n) out (n),a
in a,(c) out (c),a
From ASGB's perspective, the RAM available from 0xff80
through 0xffff is composed of unused I/O locations rather than
direct-page RAM.
ASGB ASSEMBLER PAGE AY-5
GAMEBOY INSTRUCTION SET
AY.4.2.3 The 'stop' Instruction -
The publically-available documentation for the Gameboy
lists the 'stop' instruction as the two-byte instruction 10 00,
and the other freely-available Gameboy assemblers assemble it in
that manner. As far as I can tell, the only rationale for this
is that the corresponding Z80 instruction ('djnz label') is a
two-byte instruction. ASGB assembles 'stop' as the one-byte in-
struction 10.
AY.4.3 Inherent Instructions
ccf cpl
daa di
ei nop
halt rla
rlca rra
rrca scf
reti stop
swap
AY.4.4 Implicit Operand Instructions
adc a,[] adc []
add a,[] add []
and a,[] and []
cp a,[] cp []
dec a,[] dec []
inc a,[] inc []
or a,[] or []
rl a,[] rl []
rlc a,[] rlc []
rr a,[] rr []
rrc a,[] rrc []
sbc a,[] sbc []
sla a,[] sla []
sra a,[] sra []
srl a,[] srl []
sub a,[] sub []
xor a,[] xor []
ASGB ASSEMBLER PAGE AY-6
GAMEBOY INSTRUCTION SET
AY.4.5 Load Instructions
ld rg,[] ld [],rg
ld (bc),a ld a,(bc)
ld (de),a ld a,(de)
ld (label),a ld a,(label)
ld (label),sp ld rp,#data
ld sp,hl ld hl,sp
ldd a,(hl) ldd (hl),a
ldi a,(hl) ldi (hl),a
AY.4.6 Call/Return Instructions
call C,label ret C
call NC,label ret NC
call Z,label ret Z
call NZ,label ret NZ
call label ret
rst n
AY.4.7 Jump Instructions
jp C,label jp NC,label
jp Z,label jp NZ,label
jp (hl) jp label
jr C,label jr NC,label
jr Z,label jr NZ,label
jr label
AY.4.8 Bit Manipulation Instructions
bit n,[]
res n,[]
set n,[]
ASGB ASSEMBLER PAGE AY-7
GAMEBOY INSTRUCTION SET
AY.4.9 Input and Output Instructions
in a,(n) in a,(c)
out (n),a out (c),a
AY.4.10 Register Pair Instructions
add hl,rp add hl,sp
add sp,#data
push rp pop rp
APPENDIX BC
ASRAB ASSEMBLER
BC.1 ACKNOWLEDGMENT
Thanks to Ulrich Raich and Razaq Ijoduola for their contribution
of the ASRAB cross assembler.
Ulrich Raich and Razaq Ijoduola
PS Division
CERN
CH-1211 Geneva-23
Ulrich Raich
Ulrich dot Raich at cern dot ch
BC.2 PROCESSOR SPECIFIC DIRECTIVES
The ASRAB assembler is a port of the ASZ80 assembler. This
assembler can process Z80, HD64180 (Z180), and Rabbit 2000/3000
(default) code. The following processor specific assembler
directives specify which processor to target when processing the
input assembler files.
ASRAB ASSEMBLER PAGE BC-2
PROCESSOR SPECIFIC DIRECTIVES
BC.2.1 .r2k Directive
Format:
.r2k
The .r2k directive enables processing of the Rabbit 2000/3000
specific mnemonics. Mnemonics not associated with the Rabbit
2000/3000 processor will be flagged with an 'o' error. Address-
ing modes not supported by the Rabbit 2000/3000 will be flagged
with an 'a' error. A synonym of .r2k is .r3k. The default as-
sembler mode is .r2k.
The .r2k directive also selects the Rabbit 2000/3000
specific cycles count to be output.
BC.2.2 .hd64 Directive
Format:
.hd64
The .hd64 directive enables processing of the HD64180 (Z180)
specific mnemonics not included in the Z80 instruction set.
Rabbit 2000/3000 mnemonics encountered will be flagged with an
'o' error. Addressing modes not supported by the HD64180 (Z180)
will be flagged with an 'a' error. A synonym of .hd64 is .z180.
The .hd64 directive also selects the HD64180/Z180 specific
cycles count to be output.
BC.2.3 .z80 Directive
Format:
.z80
The .z80 directive enables processing of the Z80 specific
mnemonics. HD64180 and Rabbit 2000/3000 specific mnemonics will
be flagged with an 'o' error. Addressing modes not supported by
the z80 will be flagged with an 'a' error.
The .z80 directive also selects the Z80 specific cycles
count to be output.
ASRAB ASSEMBLER PAGE BC-3
PROCESSOR SPECIFIC DIRECTIVES
BC.2.4 The .__.CPU. Variable
The value of the pre-defined symbol '.__.CPU.' corresponds
to the selected processor type. The default value is 0 which
corresponds to the default processor type. The following table
lists the processor types and associated values for the ASRAB
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.r2k / .r3k 0
.hd64 / .z180 1
.z80 2
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
variable type to global causing its definition to be output to
the .rel file. The inclusion of the definition of the variable
'.__.CPU.' might be a useful means of validating that seperately
assembled files have been compiled for the same processor type.
The linker will report an error for variables with multiple non
equal definitions.
ASRAB ASSEMBLER PAGE BC-4
PROCESSOR SPECIFIC DIRECTIVES
BC.3 RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
BC.3.1 Instruction Symbols
b Bit select
(000 = bit 0, 001 = bit 1,
010 = bit 2, 011 = bit 3,
100 = bit 4, 101 = bit 5,
110 = bit 6, 111 = bit 7)
cc Condition code select
(00 = NZ, 01 = Z, 10 = NC, 11 = C)
d 8-bit (signed) displacement.
Expressed in two\'s complement.
dd word register select-destination
(00 = BC, 01 = DE, 10 = HL, 11 = SP)
dd' word register select-alternate
(00 = BC', 01 = DE', 10 = HL')
e 8-bit (signed) displacement added to PC.
f condition code select
(000 = NZ, 001 = Z, 010 = NC, 011 = C,
100 = LZ/NV, 101 = LO/V, 110 = P, 111 = M)
m the most significant bits(MSB) of a 16-bit constant
mn 16-bit constant
n 8-bit constant or the least significant bits(LSB)
of a 16-bit constant
r, g byte register select
(000 = B, 001 = C, 010 = D, 011 = E,
100 = H, 101 = L, 111 = A)
ss word register select-source
(00 = BC, 01 = DE, 10 = HL, 11 = SP)
v Restart address select
(010 = 0020h, 011 = 0030h, 100 = 0040h,
101 = 0050h, 111 = 0070h)
x an 8-bit constant to load into the XPC
xx word register select
(00 = BC, 01 = DE, 10 = IX, 11 = SP)
yy word register select
(00 = BC, 01 = DE, 10 = IY, 11 = SP)
zz word register select
(00 = BC, 01 = DE, 10 = HL, 11 = AF)
ASRAB ASSEMBLER PAGE BC-5
RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
C - carry bit set
M - sign bit set
NC - carry bit clear
NZ - zero bit clear
P - sign bit clear
PE - parity even
V - overflow bit set
PO - parity odd
NV - overflow bit clear
Z - zero bit set
The terms m, mn, n, and x may all be expressions. The terms b
and v are not allowed to be external references.
ASRAB ASSEMBLER PAGE BC-6
RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
BC.3.2 Rabbit Instructions
The following list of instructions (with explicit address-
ing modes) are available in the Rabbit 2000/3000 assembler mode.
Those instructions denoted by an asterisk (*) are additional in-
structions not available in the HD64180 or Z80 assembler mode.
ADC A,n DEC IX LD A,EIR
ADC A,r DEC IY LD A,IIR
ADC A,(HL) DEC r *LD A,XPC
ADC A,(IX+d) DEC ss LD A,(BC)
ADC A,(IY+d) DEC (HL) LD A,(DE)
ADC HL,ss DEC (IX+d) LD A,(mn)
ADD A,n DEC (IY+d) *LD dd,BC
ADD A,r DJNZ e *LD dd,DE
ADD A,(HL) LD dd,mn
ADD A,(IX+d) EX AF,AF LD dd,(mn)
ADD A,(IY+d) EX DE,HL LD EIR,A
ADD HL,ss EX DE,HL *LD HL,IX
ADD IX,xx EX (SP),HL *LD HL,IY
ADD IY,yy EX (SP),IX *LD HL,(HL+d)
*ADD SP,d EX (SP),IY *LD HL,(IX+d)
*ALTD EXX *LD HL,(IY+d)
*AND HL,DE LD HL,(mn)
*AND IX,DE INC IX *LD HL,(SP+n)
*AND IY,DE INC IY LD IIR,A
AND n INC r *LD IX,HL
AND r INC ss LD IX,mn
AND (HL) INC (HL) LD IX,(mn)
AND (IX+d) INC (IX+d) *LD IX,(SP+n)
AND (IY+d) INC (IY+d) *LD IY,HL
*IOE LD IY,mn
BIT b,r *IOI LD IY,(mn)
BIT b,(HL) *IPRES *LD IY,(SP+n)
BIT b,(IX+d) *IPSET 0 LD r,g
BIT b,(IY+d) *IPSET 1 LD r,n
*BOOL HL *IPSET 2 LD r,(HL)
*BOOL IX *IPSET 3 LD r,(IX+d)
*BOOL IY LD r,(IY+d)
JP f,mn LD SP,HL
CALL mn JP mn LD SP,IX
CCF JP (HL) LD SP,IY
CP n JP (IX) *LD XPC,A
CP r JP (IY) LD (BC),A
CP (HL) JR cc,e LD (DE),A
CP (IX+d) JR e LD (HL),n
CP (IY+d) LD (HL),r
CPL *LCALL x,mn
ASRAB ASSEMBLER PAGE BC-7
RABBIT 2000/3000 ADDRESSING AND INSTRUCTIONS
*LD (HL+d),HL *POP IP SBC A,n
*LD (IX+d),HL POP IX SBC A,r
LD (IX+d),n POP IY SBC A,(HL)
LD (IX+d),r POP zz SBC HL,ss
*LD (IY+d),HL *PUSH IP SBC (IX+d)
LD (IY+d),n PUSH IX SBC (IY+d)
LD (IY+d),r PUSH IY SCF
LD (mn),A PUSH zz SET b,r
LD (mn),HL SET b,(HL)
LD (mn),IX RA SET b,(IX+d)
LD (mn),IY RES b,r SET b,(IY+d)
LD (mn),ss RES b,(HL) SLA r
*LD (SP+n),HL RES b,(IX+d) SLA (HL)
*LD (SP+n),IX RES b,(IY+d) SLA (IX+d)
*LD (SP+n),IY RET SLA (IY+d)
LDD RET f SRA r
LDDR *RETI SRA (HL)
LDI *RL DE SRA (IX+d)
LDIR RL r SRA (IY+d)
*LDP HL,(HL) RL (HL) SRL r
*LDP HL,(IX) RL (IX+d) SRL (HL)
*LDP HL,(IY) RL (IY+d) SRL (IX+d)
*LDP HL,(mn) RLA SRL (IY+d)
*LDP IX,(mn) RLC r SUB n
*LDP IY,(mn) RLC (HL) SUB r
*LDP (HL),HL RLC (IX+d) SUB (HL)
*LDP (IX),HL RLC (IY+d) SUB (IX+d)
*LDP (IY),HL RLCA SUB (IY+d)
*LDP (mn),HL *RR DE
*LDP (mn),IX *RR HL XOR n
*LDP (mn),IY *RR IX XOR r
LJP x,mn *RR IY XOR (HL)
LRET RR r XOR (IX+d)
RR (HL) XOR (IY+d)
*MUL RR (IX+d)
RR (IY+d)
NEG RRC r
NOP RRC (HL)
RRC (IX+d)
*OR HL,DE RRC (IY+d)
*OR IX,DE RRCA
*OR IY,DE RST v
OR n
OR r
OR (HL)
OR (IX+d)
OR (IY+d)
ASRAB ASSEMBLER PAGE BC-8
Z80/HD64180 ADDRESSING AND INSTRUCTIONS
BC.4 Z80/HD64180 ADDRESSING AND INSTRUCTIONS
The following list specifies the format for each Z80/HD64180 ad-
dressing mode supported by ASZ80:
#data immediate data
byte or word data
n byte value
rg a byte register
a,b,c,d,e,h,l
rp a register pair
bc,de,hl
(hl) implied addressing or
register indirect addressing
(label) direct addressing
(ix+offset) indexed addressing with
offset(ix) an offset
label call/jmp/jr label
The terms data, n, label, and offset, may all be expressions.
The terms dir and offset are not allowed to be external refer-
ences.
The following tables list all Z80/HD64180 mnemonics recog-
nized by the ASRAB assembler. The designation [] refers to a
required addressing mode argument. Note that not all addressing
modes are valid with every instruction, refer to the Z80/HD64180
technical data for valid modes.
ASRAB ASSEMBLER PAGE BC-9
Z80/HD64180 ADDRESSING AND INSTRUCTIONS
BC.4.1 Inherent Instructions
ccf cpd
cpdr cpi
cpir cpl
daa di
ei exx
halt neg
nop reti
retn rla
rlca rld
rra rrca
rrd scf
BC.4.2 Implicit Operand Instructions
adc a,[] adc []
add a,[] add []
and a,[] and []
cp a,[] cp []
dec a,[] dec []
inc a,[] inc []
or a,[] or []
rl a,[] rl []
rlc a,[] rlc []
rr a,[] rr []
rrc a,[] rrc []
sbc a,[] sbc []
sla a,[] sla []
sra a,[] sra []
srl a,[] srl []
sub a,[] sub []
xor a,[] xor []
ASRAB ASSEMBLER PAGE BC-10
Z80/HD64180 ADDRESSING AND INSTRUCTIONS
BC.4.3 Load Instruction
ld rg,[] ld [],rg
ld (bc),a ld a,(bc)
ld (de),a ld a,(de)
ld (label),a ld a,(label)
ld (label),rp ld rp,(label)
ld i,a ld r,a
ld a,i ld a,r
ld sp,hl ld sp,ix
ld sp,iy ld rp,#data
ldd lddr
ldi ldir
BC.4.4 Call/Return Instructions
call C,label ret C
call M,label ret M
call NC,label ret NC
call NZ,label ret NZ
call P,label ret P
call PE,label ret PE
call PO,label ret PO
call Z,label ret Z
call label ret
BC.4.5 Jump and Jump to Subroutine Instructions
jp C,label jp M,label
jp NC,label jp NZ,label
jp P,label jp PE,label
jp PO,label jp Z,label
jp (hl) jp (ix)
jp (iy) jp label
djnz label
jr C,label jr NC,label
jr NZ,label jr Z,label
jr label
ASRAB ASSEMBLER PAGE BC-11
Z80/HD64180 ADDRESSING AND INSTRUCTIONS
BC.4.6 Bit Manipulation Instructions
bit n,[]
res n,[]
set n,[]
BC.4.7 Interrupt Mode and Reset Instructions
im n
im n
im n
rst n
BC.4.8 Input and Output Instructions
in a,(n) in rg,(c)
ind indr
ini inir
out (n),a out (c),rg
outd otdr
outi otir
BC.4.9 Register Pair Instructions
add hl,rp add ix,rp
add iy,rp
adc hl,rp sbc hl,rp
ex (sp),hl ex (sp),ix
ex (sp),iy
ex de,hl
ex af,af'
push rp pop rp
ASRAB ASSEMBLER PAGE BC-12
Z80/HD64180 ADDRESSING AND INSTRUCTIONS
BC.4.10 HD64180 Specific Instructions
in0 rg,(n)
out0 (n),rg
otdm otdmr
otim otimr
mlt bc mlt de
mlt hl mlt sp
slp
tst a
tstio #data
APPENDIX BI
ASZ80 ASSEMBLER
BI.1 .z80 DIRECTIVE
Format:
.z80
The .z80 directive enables processing of only the z80 specific
mnemonics. HD64180/Z180 mnemonics encountered without the .hd64
directive will be flagged with an 'o' error.
The .z80 directive also selects the Z80 specific cycles
count to be output.
BI.2 .hd64 DIRECTIVE
Format:
.hd64
The .hd64 directive enables processing of the HD64180/Z180
specific mnemonics not included in the Z80 instruction set.
HD64180/Z180 mnemonics encountered without the .hd64 directive
will be flagged with an 'o' error. A synonym of .hd64 is .z180.
The .hd64 directive also selects the HD64180/Z180 specific
cycles count to be output.
ASZ80 ASSEMBLER PAGE BI-2
THE .__.CPU. VARIABLE
BI.3 THE .__.CPU. VARIABLE
The value of the pre-defined symbol '.__.CPU.' corresponds
to the selected processor type. The default value is 0 which
corresponds to the default processor type. The following table
lists the processor types and associated values for the ASZ80
assembler:
Processor Type .__.CPU. Value
-------------- --------------
.z80 0
.hd64 / .z180 1
The variable '.__.CPU.' is by default defined as local and
will not be output to the created .rel file. The assembler com-
mand line options -g or -a will not cause the local symbol to be
output to the created .rel file.
The assembler .globl directive may be used to change the
the variable type to global causing its definition to be output
to the .rel file. The inclusion of the definition of the vari-
able '.__.CPU.' might be a useful means of validating that
seperately assembled files have been compiled for the same pro-
cessor type. The linker will report an error for variables with
multiple non equal definitions.
BI.4 Z80 REGISTER SET AND CONDITIONS
The following is a complete list of register designations
and condition mnemonics:
byte registers - a,b,c,d,e,h,l,i,r
register pairs - af,af',bc,de,hl
word registers - pc,sp,ix,iy
C - carry bit set
M - sign bit set
NC - carry bit clear
NZ - zero bit clear
P - sign bit clear
PE - parity even
PO - parity odd
Z - zero bit set
ASZ80 ASSEMBLER PAGE BI-3
Z80 INSTRUCTION SET
BI.5 Z80 INSTRUCTION SET
The following list specifies the format for each addressing
mode supported by ASZ80:
#data immediate data
byte or word data
n byte value
rg a byte register
a,b,c,d,e,h,l
rp a register pair
bc,de,hl
(hl) implied addressing or
register indirect addressing
(label) direct addressing
offset(ix) indexed addressing with
an offset
label call/jmp/jr label
The terms data, n, label, and offset may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the Z80/HD64180/Z180 technical data for
valid modes.
The following tables list all Z80/HD64180/Z180 mnemonics
recognized by the ASZ80 assembler. The designation [] refers to
a required addressing mode argument.
ASZ80 ASSEMBLER PAGE BI-4
Z80 INSTRUCTION SET
BI.5.1 Inherent Instructions
ccf cpd
cpdr cpi
cpir cpl
daa di
ei exx
halt neg
nop reti
retn rla
rlca rld
rra rrca
rrd scf
BI.5.2 Implicit Operand Instructions
adc a,[] adc []
add a,[] add []
and a,[] and []
cp a,[] cp []
dec a,[] dec []
inc a,[] inc []
or a,[] or []
rl a,[] rl []
rlc a,[] rlc []
rr a,[] rr []
rrc a,[] rrc []
sbc a,[] sbc []
sla a,[] sla []
sra a,[] sra []
srl a,[] srl []
sub a,[] sub []
xor a,[] xor []
ASZ80 ASSEMBLER PAGE BI-5
Z80 INSTRUCTION SET
BI.5.3 Load Instruction
ld rg,[] ld [],rg
ld (bc),a ld a,(bc)
ld (de),a ld a,(de)
ld (label),a ld a,(label)
ld (label),rp ld rp,(label)
ld i,a ld r,a
ld a,i ld a,r
ld sp,hl ld sp,ix
ld sp,iy ld rp,#data
ldd lddr
ldi ldir
BI.5.4 Call/Return Instructions
call C,label ret C
call M,label ret M
call NC,label ret NC
call NZ,label ret NZ
call P,label ret P
call PE,label ret PE
call PO,label ret PO
call Z,label ret Z
call label ret
BI.5.5 Jump and Jump to Subroutine Instructions
jp C,label jp M,label
jp NC,label jp NZ,label
jp P,label jp PE,label
jp PO,label jp Z,label
jp (hl) jp (ix)
jp (iy) jp label
djnz label
jr C,label jr NC,label
jr NZ,label jr Z,label
jr label
ASZ80 ASSEMBLER PAGE BI-6
Z80 INSTRUCTION SET
BI.5.6 Bit Manipulation Instructions
bit n,[]
res n,[]
set n,[]
BI.5.7 Interrupt Mode and Reset Instructions
im n
im n
im n
rst n
BI.5.8 Input and Output Instructions
in a,(n) in rg,(c)
ind indr
ini inir
out (n),a out (c),rg
outd otdr
outi otir
BI.5.9 Register Pair Instructions
add hl,rp add ix,rp
add iy,rp
adc hl,rp sbc hl,rp
ex (sp),hl ex (sp),ix
ex (sp),iy
ex de,hl
ex af,af'
push rp pop rp
ASZ80 ASSEMBLER PAGE BI-7
Z80 INSTRUCTION SET
BI.5.10 HD64180/Z180 Specific Instructions
in0 rg,(n)
out0 (n),rg
otdm otdmr
otim otimr
mlt bc mlt de
mlt hl mlt sp
slp
tst a
tstio #data
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