* Unify STM32 implementation, remove legacy STM32F1
* Add build stage for STM32F4 examples
* Apply restyling patch
* Update fqbn for STM32F1 and STM32F4 builds
* Update fqbn parameters for STM32F1 and STM32F4 builds
* Update fqbn for STM32F1 to use BLUEPILL_F103C8
* Add STM32F4 build stages to pipeline
* Fix condition for setting build status on failure
* Add NVRAM support
This is an EEPROM replacement based on MCU's internal Flash memory.
The NVRAM class is designed to be stateless. Each operation is
written to flash immediately.
The last 16k(nRF51)/32k(nRF52) of Flash memory are managed by the
VirtualPage class. This class allows writing a single emulated 4k
page up 40,000 times.
The NVRAM class is a log based byte-wise storage allowing up to
40,000,000 writes depending on the number of used addresses. Each
four allocated addresses from the beginning of the NVRAM reduce the
write log by one.
When first 256 bytes of the emulated storage are used, there is an
average writing capacity of 145,000 cycles per byte.
When the write log is full, the NVRAM is compressed into a new flash
page. After a new page is ready, the old page is released. This
process can take up to 4500 ms and cannot be interrupted.
The NVRAM functionality can easily be ported to ESP8266 or SAMD by
providing a Flash interface.
* Add NRF5 platform support
This is the support of the Nordic Semiconductor NRF51 (nrf51822,
nrf51422) and NRF52 (nrf52832) platform. Based on arduino-nRF5
(https://github.com/sandeepmistry/arduino-nRF5).
The included radio driver is compatible with the NRF24 devices.
Using a SoftDevice (BLE)is not supported and must be removed before
flashing MySensors with a "mass_erase" operation.
* Add critical section support
Allows defining a code block which is executed as a critical section.
Supports AVR, ESP8266 & SAMD.
* Add receive message buffering
When MY_RF24_IRQ_PIN is defined (and connected), a buffer will be used
to retrieve & store messages received by nRF24 as fast as possible.
This reduces the chance of losing messages due to a busy
microcontroller.
nRF24 SPI rx message transfer is running from interrupt context when
MY_RF24_IRQ_PIN is defined. If this transfer takes too long, serial
characters received will get lost. Therefore serial rx is enabled during
SPI transfer of nRF messages.
Limitations: Only AVR/SAMD & nRF24L01+ combinations can buffer rx
messages.
nRF24L01+ IRQ pin should be connected to AVR.
Tested on W5100- & Serial-gateway.
SAMD has not been tested yet!
* Fix Doxygen warnings
* Fix more Doxygen warnings
