From 8a89fd36865eeb3fac880275e34395346f500b4e Mon Sep 17 00:00:00 2001 From: Victor Mateus Oliveira Date: Mon, 22 Feb 2021 00:51:49 -0300 Subject: [PATCH] PlatformIO project --- .gitignore | 7 + Src/pio/ldscript.ld | 203 ++++++++++++++ Src/pio/startup_stm32f407xx.S | 505 ++++++++++++++++++++++++++++++++++ Src/pio/syscalls.c | 106 +++++++ configure-build.py | 118 ++++++++ encrypt-firmware.py | 26 ++ platformio.ini | 44 +++ source-files.txt | 167 +++++++++++ 8 files changed, 1176 insertions(+) create mode 100644 .gitignore create mode 100644 Src/pio/ldscript.ld create mode 100644 Src/pio/startup_stm32f407xx.S create mode 100644 Src/pio/syscalls.c create mode 100644 configure-build.py create mode 100644 encrypt-firmware.py create mode 100644 platformio.ini create mode 100644 source-files.txt diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..5faaca3 --- /dev/null +++ b/.gitignore @@ -0,0 +1,7 @@ +.pio +.vscode/.browse.c_cpp.db* +.vscode/c_cpp_properties.json +.vscode/launch.json +.vscode/ipch +.vscode/extensions.json +.vscode/settings.json diff --git a/Src/pio/ldscript.ld b/Src/pio/ldscript.ld new file mode 100644 index 0000000..19eec62 --- /dev/null +++ b/Src/pio/ldscript.ld @@ -0,0 +1,203 @@ +/* +****************************************************************************** +** +** File : LinkerScript.ld +** +** Abstract : Linker script for STM32F4x7Vx Device with +** 512/1024KByte FLASH, 192KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +***************************************************************************** +** @attention +** +**

© COPYRIGHT(c) 2019 STMicroelectronics

+** +** Redistribution and use in source and binary forms, with or without modification, +** are permitted provided that the following conditions are met: +** 1. Redistributions of source code must retain the above copyright notice, +** this list of conditions and the following disclaimer. +** 2. Redistributions in binary form must reproduce the above copyright notice, +** this list of conditions and the following disclaimer in the documentation +** and/or other materials provided with the distribution. +** 3. Neither the name of STMicroelectronics nor the names of its contributors +** may be used to endorse or promote products derived from this software +** without specific prior written permission. +** +** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE +** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR +** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER +** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, +** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20000000 + LD_MAX_DATA_SIZE; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ +RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE +CCMRAM (rw) : ORIGIN = 0x10000000, LENGTH = 64K +FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + } >FLASH + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM AT> FLASH + + _siccmram = LOADADDR(.ccmram); + + /* CCM-RAM section + * + * IMPORTANT NOTE! + * If initialized variables will be placed in this section, + * the startup code needs to be modified to copy the init-values. + */ + .ccmram : + { + . = ALIGN(4); + _sccmram = .; /* create a global symbol at ccmram start */ + *(.ccmram) + *(.ccmram*) + + . = ALIGN(4); + _eccmram = .; /* create a global symbol at ccmram end */ + } >CCMRAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/Src/pio/startup_stm32f407xx.S b/Src/pio/startup_stm32f407xx.S new file mode 100644 index 0000000..607e9d0 --- /dev/null +++ b/Src/pio/startup_stm32f407xx.S @@ -0,0 +1,505 @@ +/** + ****************************************************************************** + * @file startup_stm32f407xx.s + * @author MCD Application Team + * @brief STM32F407xx Devices vector table for GCC based toolchains. + * This module performs: + * - Set the initial SP + * - Set the initial PC == Reset_Handler, + * - Set the vector table entries with the exceptions ISR address + * - Branches to main in the C library (which eventually + * calls main()). + * After Reset the Cortex-M4 processor is in Thread mode, + * priority is Privileged, and the Stack is set to Main. + ****************************************************************************** + * @attention + * + *

© Copyright (c) 2017 STMicroelectronics. + * All rights reserved.

+ * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + ldr sp, =_estack /* set stack pointer */ + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call the clock system intitialization function.*/ + bl SystemInit +/* Call static constructors */ + bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + /* External Interrupts */ + .word WWDG_IRQHandler /* Window WatchDog */ + .word PVD_IRQHandler /* PVD through EXTI Line detection */ + .word TAMP_STAMP_IRQHandler /* Tamper and TimeStamps through the EXTI line */ + .word RTC_WKUP_IRQHandler /* RTC Wakeup through the EXTI line */ + .word FLASH_IRQHandler /* FLASH */ + .word RCC_IRQHandler /* RCC */ + .word EXTI0_IRQHandler /* EXTI Line0 */ + .word EXTI1_IRQHandler /* EXTI Line1 */ + .word EXTI2_IRQHandler /* EXTI Line2 */ + .word EXTI3_IRQHandler /* EXTI Line3 */ + .word EXTI4_IRQHandler /* EXTI Line4 */ + .word DMA1_Stream0_IRQHandler /* DMA1 Stream 0 */ + .word DMA1_Stream1_IRQHandler /* DMA1 Stream 1 */ + .word DMA1_Stream2_IRQHandler /* DMA1 Stream 2 */ + .word DMA1_Stream3_IRQHandler /* DMA1 Stream 3 */ + .word DMA1_Stream4_IRQHandler /* DMA1 Stream 4 */ + .word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */ + .word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */ + .word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */ + .word CAN1_TX_IRQHandler /* CAN1 TX */ + .word CAN1_RX0_IRQHandler /* CAN1 RX0 */ + .word CAN1_RX1_IRQHandler /* CAN1 RX1 */ + .word CAN1_SCE_IRQHandler /* CAN1 SCE */ + .word EXTI9_5_IRQHandler /* External Line[9:5]s */ + .word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */ + .word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */ + .word TIM1_TRG_COM_TIM11_IRQHandler /* TIM1 Trigger and Commutation and TIM11 */ + .word TIM1_CC_IRQHandler /* TIM1 Capture Compare */ + .word TIM2_IRQHandler /* TIM2 */ + .word TIM3_IRQHandler /* TIM3 */ + .word TIM4_IRQHandler /* TIM4 */ + .word I2C1_EV_IRQHandler /* I2C1 Event */ + .word I2C1_ER_IRQHandler /* I2C1 Error */ + .word I2C2_EV_IRQHandler /* I2C2 Event */ + .word I2C2_ER_IRQHandler /* I2C2 Error */ + .word SPI1_IRQHandler /* SPI1 */ + .word SPI2_IRQHandler /* SPI2 */ + .word USART1_IRQHandler /* USART1 */ + .word USART2_IRQHandler /* USART2 */ + .word USART3_IRQHandler /* USART3 */ + .word EXTI15_10_IRQHandler /* External Line[15:10]s */ + .word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */ + .word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */ + .word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */ + .word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */ + .word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */ + .word TIM8_CC_IRQHandler /* TIM8 Capture Compare */ + .word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */ + .word FSMC_IRQHandler /* FSMC */ + .word SDIO_IRQHandler /* SDIO */ + .word TIM5_IRQHandler /* TIM5 */ + .word SPI3_IRQHandler /* SPI3 */ + .word UART4_IRQHandler /* UART4 */ + .word UART5_IRQHandler /* UART5 */ + .word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */ + .word TIM7_IRQHandler /* TIM7 */ + .word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */ + .word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */ + .word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */ + .word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */ + .word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */ + .word ETH_IRQHandler /* Ethernet */ + .word ETH_WKUP_IRQHandler /* Ethernet Wakeup through EXTI line */ + .word CAN2_TX_IRQHandler /* CAN2 TX */ + .word CAN2_RX0_IRQHandler /* CAN2 RX0 */ + .word CAN2_RX1_IRQHandler /* CAN2 RX1 */ + .word CAN2_SCE_IRQHandler /* CAN2 SCE */ + .word OTG_FS_IRQHandler /* USB OTG FS */ + .word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */ + .word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */ + .word DMA2_Stream7_IRQHandler /* DMA2 Stream 7 */ + .word USART6_IRQHandler /* USART6 */ + .word I2C3_EV_IRQHandler /* I2C3 event */ + .word I2C3_ER_IRQHandler /* I2C3 error */ + .word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */ + .word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */ + .word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */ + .word OTG_HS_IRQHandler /* USB OTG HS */ + .word DCMI_IRQHandler /* DCMI */ + .word 0 /* CRYP crypto */ + .word HASH_RNG_IRQHandler /* Hash and Rng */ + .word FPU_IRQHandler /* FPU */ + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + + .weak WWDG_IRQHandler + .thumb_set WWDG_IRQHandler,Default_Handler + + .weak PVD_IRQHandler + .thumb_set PVD_IRQHandler,Default_Handler + + .weak TAMP_STAMP_IRQHandler + .thumb_set TAMP_STAMP_IRQHandler,Default_Handler + + .weak RTC_WKUP_IRQHandler + .thumb_set RTC_WKUP_IRQHandler,Default_Handler + + .weak FLASH_IRQHandler + .thumb_set FLASH_IRQHandler,Default_Handler + + .weak RCC_IRQHandler + .thumb_set RCC_IRQHandler,Default_Handler + + .weak EXTI0_IRQHandler + .thumb_set EXTI0_IRQHandler,Default_Handler + + .weak EXTI1_IRQHandler + .thumb_set EXTI1_IRQHandler,Default_Handler + + .weak EXTI2_IRQHandler + .thumb_set EXTI2_IRQHandler,Default_Handler + + .weak EXTI3_IRQHandler + .thumb_set EXTI3_IRQHandler,Default_Handler + + .weak EXTI4_IRQHandler + .thumb_set EXTI4_IRQHandler,Default_Handler + + .weak DMA1_Stream0_IRQHandler + .thumb_set DMA1_Stream0_IRQHandler,Default_Handler + + .weak DMA1_Stream1_IRQHandler + .thumb_set DMA1_Stream1_IRQHandler,Default_Handler + + .weak DMA1_Stream2_IRQHandler + .thumb_set DMA1_Stream2_IRQHandler,Default_Handler + + .weak DMA1_Stream3_IRQHandler + .thumb_set DMA1_Stream3_IRQHandler,Default_Handler + + .weak DMA1_Stream4_IRQHandler + .thumb_set DMA1_Stream4_IRQHandler,Default_Handler + + .weak DMA1_Stream5_IRQHandler + .thumb_set DMA1_Stream5_IRQHandler,Default_Handler + + .weak DMA1_Stream6_IRQHandler + .thumb_set DMA1_Stream6_IRQHandler,Default_Handler + + .weak ADC_IRQHandler + .thumb_set ADC_IRQHandler,Default_Handler + + .weak CAN1_TX_IRQHandler + .thumb_set CAN1_TX_IRQHandler,Default_Handler + + .weak CAN1_RX0_IRQHandler + .thumb_set CAN1_RX0_IRQHandler,Default_Handler + + .weak CAN1_RX1_IRQHandler + .thumb_set CAN1_RX1_IRQHandler,Default_Handler + + .weak CAN1_SCE_IRQHandler + .thumb_set CAN1_SCE_IRQHandler,Default_Handler + + .weak EXTI9_5_IRQHandler + .thumb_set EXTI9_5_IRQHandler,Default_Handler + + .weak TIM1_BRK_TIM9_IRQHandler + .thumb_set TIM1_BRK_TIM9_IRQHandler,Default_Handler + + .weak TIM1_UP_TIM10_IRQHandler + .thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler + + .weak TIM1_TRG_COM_TIM11_IRQHandler + .thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler + + .weak TIM1_CC_IRQHandler + .thumb_set TIM1_CC_IRQHandler,Default_Handler + + .weak TIM2_IRQHandler + .thumb_set TIM2_IRQHandler,Default_Handler + + .weak TIM3_IRQHandler + .thumb_set TIM3_IRQHandler,Default_Handler + + .weak TIM4_IRQHandler + .thumb_set TIM4_IRQHandler,Default_Handler + + .weak I2C1_EV_IRQHandler + .thumb_set I2C1_EV_IRQHandler,Default_Handler + + .weak I2C1_ER_IRQHandler + .thumb_set I2C1_ER_IRQHandler,Default_Handler + + .weak I2C2_EV_IRQHandler + .thumb_set I2C2_EV_IRQHandler,Default_Handler + + .weak I2C2_ER_IRQHandler + .thumb_set I2C2_ER_IRQHandler,Default_Handler + + .weak SPI1_IRQHandler + .thumb_set SPI1_IRQHandler,Default_Handler + + .weak SPI2_IRQHandler + .thumb_set SPI2_IRQHandler,Default_Handler + + .weak USART1_IRQHandler + .thumb_set USART1_IRQHandler,Default_Handler + + .weak USART2_IRQHandler + .thumb_set USART2_IRQHandler,Default_Handler + + .weak USART3_IRQHandler + .thumb_set USART3_IRQHandler,Default_Handler + + .weak EXTI15_10_IRQHandler + .thumb_set EXTI15_10_IRQHandler,Default_Handler + + .weak RTC_Alarm_IRQHandler + .thumb_set RTC_Alarm_IRQHandler,Default_Handler + + .weak OTG_FS_WKUP_IRQHandler + .thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler + + .weak TIM8_BRK_TIM12_IRQHandler + .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler + + .weak TIM8_UP_TIM13_IRQHandler + .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler + + .weak TIM8_TRG_COM_TIM14_IRQHandler + .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler + + .weak TIM8_CC_IRQHandler + .thumb_set TIM8_CC_IRQHandler,Default_Handler + + .weak DMA1_Stream7_IRQHandler + .thumb_set DMA1_Stream7_IRQHandler,Default_Handler + + .weak FSMC_IRQHandler + .thumb_set FSMC_IRQHandler,Default_Handler + + .weak SDIO_IRQHandler + .thumb_set SDIO_IRQHandler,Default_Handler + + .weak TIM5_IRQHandler + .thumb_set TIM5_IRQHandler,Default_Handler + + .weak SPI3_IRQHandler + .thumb_set SPI3_IRQHandler,Default_Handler + + .weak UART4_IRQHandler + .thumb_set UART4_IRQHandler,Default_Handler + + .weak UART5_IRQHandler + .thumb_set UART5_IRQHandler,Default_Handler + + .weak TIM6_DAC_IRQHandler + .thumb_set TIM6_DAC_IRQHandler,Default_Handler + + .weak TIM7_IRQHandler + .thumb_set TIM7_IRQHandler,Default_Handler + + .weak DMA2_Stream0_IRQHandler + .thumb_set DMA2_Stream0_IRQHandler,Default_Handler + + .weak DMA2_Stream1_IRQHandler + .thumb_set DMA2_Stream1_IRQHandler,Default_Handler + + .weak DMA2_Stream2_IRQHandler + .thumb_set DMA2_Stream2_IRQHandler,Default_Handler + + .weak DMA2_Stream3_IRQHandler + .thumb_set DMA2_Stream3_IRQHandler,Default_Handler + + .weak DMA2_Stream4_IRQHandler + .thumb_set DMA2_Stream4_IRQHandler,Default_Handler + + .weak ETH_IRQHandler + .thumb_set ETH_IRQHandler,Default_Handler + + .weak ETH_WKUP_IRQHandler + .thumb_set ETH_WKUP_IRQHandler,Default_Handler + + .weak CAN2_TX_IRQHandler + .thumb_set CAN2_TX_IRQHandler,Default_Handler + + .weak CAN2_RX0_IRQHandler + .thumb_set CAN2_RX0_IRQHandler,Default_Handler + + .weak CAN2_RX1_IRQHandler + .thumb_set CAN2_RX1_IRQHandler,Default_Handler + + .weak CAN2_SCE_IRQHandler + .thumb_set CAN2_SCE_IRQHandler,Default_Handler + + .weak OTG_FS_IRQHandler + .thumb_set OTG_FS_IRQHandler,Default_Handler + + .weak DMA2_Stream5_IRQHandler + .thumb_set DMA2_Stream5_IRQHandler,Default_Handler + + .weak DMA2_Stream6_IRQHandler + .thumb_set DMA2_Stream6_IRQHandler,Default_Handler + + .weak DMA2_Stream7_IRQHandler + .thumb_set DMA2_Stream7_IRQHandler,Default_Handler + + .weak USART6_IRQHandler + .thumb_set USART6_IRQHandler,Default_Handler + + .weak I2C3_EV_IRQHandler + .thumb_set I2C3_EV_IRQHandler,Default_Handler + + .weak I2C3_ER_IRQHandler + .thumb_set I2C3_ER_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_OUT_IRQHandler + .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler + + .weak OTG_HS_EP1_IN_IRQHandler + .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler + + .weak OTG_HS_WKUP_IRQHandler + .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler + + .weak OTG_HS_IRQHandler + .thumb_set OTG_HS_IRQHandler,Default_Handler + + .weak DCMI_IRQHandler + .thumb_set DCMI_IRQHandler,Default_Handler + + .weak HASH_RNG_IRQHandler + .thumb_set HASH_RNG_IRQHandler,Default_Handler + + .weak FPU_IRQHandler + .thumb_set FPU_IRQHandler,Default_Handler + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/Src/pio/syscalls.c b/Src/pio/syscalls.c new file mode 100644 index 0000000..0356a57 --- /dev/null +++ b/Src/pio/syscalls.c @@ -0,0 +1,106 @@ +/** + * \file syscalls_stm32.c + * + * Implementation of newlib syscall. + * + */ + +#include "stm32f4xx.h" +#if defined ( __GNUC__ ) /* GCC CS3 */ + #include +#endif +#include +#undef errno +extern int errno; + +extern size_t uart_debug_write(uint8_t *data, uint32_t size); + +// Helper macro to mark unused parameters and prevent compiler warnings. +// Appends _UNUSED to the variable name to prevent accidentally using them. +#ifdef UNUSED + #undef UNUSED +#endif +#ifdef __GNUC__ + #define UNUSED(x) x ## _UNUSED __attribute__((__unused__)) +#else + #define UNUSED(x) x ## _UNUSED +#endif + +__attribute__((weak)) +caddr_t _sbrk(int incr) +{ + extern char _estack; /* Defined in the linker script */ + extern char _Min_Stack_Size; /* Defined in the linker script */ + extern char _end; /* Defined by the linker */ + static char *heap_end = &_end ; + char *prev_heap_end = heap_end; + + if (heap_end + incr > (char *)__get_MSP()) { + /* Heap and stack collision */ + errno = ENOMEM; + return (caddr_t) -1; + } + /* Ensure to keep minimun stack size defined in the linker script */ + if (heap_end + incr >= (char *)(&_estack - &_Min_Stack_Size)) { + errno = ENOMEM; + return (caddr_t) -1; + } + + heap_end += incr ; + return (caddr_t) prev_heap_end ; +} + +__attribute__((weak)) +int _close(UNUSED(int file)) +{ + return -1; +} + +__attribute__((weak)) +int _fstat(UNUSED(int file), struct stat *st) +{ + st->st_mode = S_IFCHR ; + return 0; +} + +__attribute__((weak)) +int _isatty(UNUSED(int file)) +{ + return 1; +} + +__attribute__((weak)) +int _lseek(UNUSED(int file), UNUSED(int ptr), UNUSED(int dir)) +{ + return 0; +} + +__attribute__((weak)) +int _read(UNUSED(int file), UNUSED(char *ptr), UNUSED(int len)) +{ + return 0; +} + +__attribute__((weak)) +int _write(UNUSED(int file), char *ptr, int len) +{ +} + +__attribute__((weak)) +void _exit(UNUSED(int status)) +{ + for (; ;) ; +} + +__attribute__((weak)) +int _kill(UNUSED(int pid), UNUSED(int sig)) +{ + errno = EINVAL; + return -1; +} + +__attribute__((weak)) +int _getpid(void) +{ + return 1; +} \ No newline at end of file diff --git a/configure-build.py b/configure-build.py new file mode 100644 index 0000000..d310dd4 --- /dev/null +++ b/configure-build.py @@ -0,0 +1,118 @@ +import os +import sys +import re +import xml.etree.ElementTree as ET + +Import("env") +platform = env.PioPlatform() +board = env.BoardConfig() + +# read IAR project file +def export_iar_project(): + files = [] + def get_files_from_group(group): + return [x.text.replace('$PROJ_DIR$\\..\\', '.\\').replace('\\', '/') for x in group.findall('file/name')] + + def get_group(group, files): + for type_tag in group.findall('group'): + f = get_files_from_group(type_tag) + files += [x for x in f if (x.endswith('.cpp') or x.endswith('.c'))] + get_group(type_tag, files) + + root = ET.parse(os.path.join(env['PROJECT_DIR'], 'EWARM/mkstft35.ewp')).getroot() + get_group(root, files) + with open(os.path.join(env['PROJECT_DIR'], 'source-files.txt'), 'wt') as fp: + for f in files: + fp.write(f + "\n") + exit(1) + +# export_iar_project() + +def load_source_files(): + files = '' + with open('./source-files.txt', 'rt') as fp: + files = ' '.join(["+<"+x.strip()+">" for x in fp.readlines()]) + + src_filter = ' '.join(env.GetProjectOption('src_filter')) + src_filter += files + proj = env.GetProjectConfig() + proj.set("env:" + env['PIOENV'], 'src_filter', src_filter) + env.Replace(SRC_FILTER=src_filter) + +load_source_files() + +env.Append(CPPPATH=[ + os.path.join(env['PROJECT_DIR'], 'Inc'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'STM32F4xx_HAL_Driver', 'Inc'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'CMSIS', 'Device', 'ST', 'STM32F4xx', 'Include'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'CMSIS', 'Include'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'Third_Party', 'FatFs', 'src'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'ST', 'STM32_USB_Host_Library', 'Class', 'MSC', 'Inc'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'Third_Party', 'FatFs', 'src', 'drivers'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'STM32F4xx_MKS_Driver', 'Inc'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'STM32F4xx_MKS_Driver', 'Src'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'libstmf4', 'include'), + os.path.join(env['PROJECT_DIR'], 'User', 'others'), + os.path.join(env['PROJECT_DIR'], 'User', 'ui'), + os.path.join(env['PROJECT_DIR'], 'Drivers', 'libstmf4'), + os.path.join(env['PROJECT_DIR'], 'User', 'uart_model'), + os.path.join(env['PROJECT_DIR'], 'User', 'others', 'Multi_language'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'GUI'), + os.path.join(env['PROJECT_DIR'], 'User', 'others', 'QRENCODE'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'Config'), + os.path.join(env['PROJECT_DIR'], 'Middlewares', 'ST', 'STM32_USB_Host_Library', 'Core', 'Inc'), + ]) + +env.Append( + CFLAGS=['-mcpu=cortex-m4', + '-mthumb', + '-ffunction-sections', + '-fdata-sections', + '-nostdlib', + '-std=gnu11', + "-fmerge-constants", + # '-funwind-tables', + # '-fasynchronous-unwind-tables', + "--param", + "max-inline-insns-single=500", + "-mfpu=fpv4-sp-d16", "-mfloat-abi=hard", + "--specs=nano.specs", + ], + + ASFLAGS=[ + "-x", "assembler-with-cpp", + '-mcpu=cortex-m4', + '-mthumb', + "-mfpu=fpv4-sp-d16", "-mfloat-abi=hard", + "--specs=nano.specs", + ], + + CXXFLAGS=[ + "-fpermissive", + "-Wno-register", + "-std=gnu++11", + "-fno-rtti", + "-fno-exceptions", + "-fno-threadsafe-statics", + "-fno-use-cxa-atexit", + ], + + LINKFLAGS=[ + "-mthumb", + "-mcpu=cortex-m4", + "-mfpu=fpv4-sp-d16", "-mfloat-abi=hard", + "--specs=nano.specs", + "-Wl,--check-sections", + "-Wl,--unresolved-symbols=report-all", + "-Wl,--warn-common", + "-Wl,--warn-section-align", + "-Wl,--warn-unresolved-symbols", + ], + + LIBS=["arm_cortexM4lf_math", "GUI"], + + LIBPATH=[os.path.join(env['PROJECT_DIR'], 'Src', 'pio', 'libs')] +) +env.Append(CXXFLAGS=env['CFLAGS']) + +env.Prepend(LINKFLAGS=['-T', "Src/pio/ldscript.ld"]) diff --git a/encrypt-firmware.py b/encrypt-firmware.py new file mode 100644 index 0000000..960b948 --- /dev/null +++ b/encrypt-firmware.py @@ -0,0 +1,26 @@ +import os,sys +Import("env") + +from SCons.Script import DefaultEnvironment +board = DefaultEnvironment().BoardConfig() + +def encrypt(source, target, env): + key = [0xA3, 0xBD, 0xAD, 0x0D, 0x41, 0x11, 0xBB, 0x8D, 0xDC, 0x80, 0x2D, 0xD0, 0xD2, 0xC4, 0x9B, 0x1E, 0x26, 0xEB, 0xE3, 0x33, 0x4A, 0x15, 0xE4, 0x0A, 0xB3, 0xB1, 0x3C, 0x93, 0xBB, 0xAF, 0xF7, 0x3E] + firmware = open(target[0].path, "rb") + robin = open(target[0].dir.path +'/'+ board.get("build.firmware"), "wb") + length = os.path.getsize(target[0].path) + position = 0 + try: + while position < length: + byte = firmware.read(1) + if position >= 320 and position < 31040: + byte = chr(ord(byte) ^ key[position & 31]) + if sys.version_info[0] > 2: + byte = bytes(byte, 'latin1') + robin.write(byte) + position += 1 + finally: + firmware.close() + robin.close() + +env.AddPostAction("$BUILD_DIR/${PROGNAME}.bin", encrypt) diff --git a/platformio.ini b/platformio.ini new file mode 100644 index 0000000..f7d2b14 --- /dev/null +++ b/platformio.ini @@ -0,0 +1,44 @@ +; PlatformIO Project Configuration File +; +; Build options: build flags, source filter +; Upload options: custom upload port, speed and extra flags +; Library options: dependencies, extra library storages +; Advanced options: extra scripting +; +; Please visit documentation for the other options and examples +; https://docs.platformio.org/page/projectconf.html + +[platformio] +src_dir = . +include_dir = . +default_envs = MKS_TFT35 + +[env] +platform = ststm32 +debug_tool = jlink +upload_protocol = jlink +src_filter = - - - - +extra_scripts = pre:configure-build.py + post:encrypt-firmware.py + +[env:MKS_TFT35] +board = genericSTM32F407VET6 +board_build.firmware = mkstft35.bin +board_build.offset = 0xC000 +build_flags = -DTFT35 + -Wl,--defsym=LD_MAX_DATA_SIZE=131032 + -Wl,--defsym=LD_FLASH_OFFSET=0xC000 + -Wl,--defsym=LD_MAX_SIZE=524288 + -DSTM32F4 + -DSTM32F407xx + -DSTM32F40XX + -DUSE_HAL_DRIVER + -DSTM32F40_41xxx + -DUSE_HAL_LIB + -DVECT_TAB_OFFSET=0xC000 + -includeInc/dump_define.h + -Wp,-w + -fmax-errors=1 + -Os + -g3 +board_upload.offset_address = 0x0800C000 \ No newline at end of file diff --git a/source-files.txt b/source-files.txt new file mode 100644 index 0000000..76658fd --- /dev/null +++ b/source-files.txt @@ -0,0 +1,167 @@ +./Src/pio/ +./Src/adc.c +./Src/bsp_driver_sd.c +./Src/dac.c +./Src/dma.c +./Src/fatfs.c +./Src/fsmc.c +./Src/gpio.c +./Src/i2c.c +./Src/iwdg.c +./Src/main.cpp +./Src/rtc.c +./Src/sdio.c +./Src/spi.c +./Src/stm32f4xx_hal_msp.c +./Src/stm32f4xx_it.c +./Src/tim.c +./Src/usart.c +./Src/usb_host.c +./Src/usbh_conf.c +./User/others/Multi_language/Font24_MS.c +./User/others/fontHz18.c +./User/others/fs_usr.cpp +./User/others/Multi_language/Helvetica26.c +./User/others/Multi_language/Helvetica36.c +./User/others/ili9320.c +./User/others/mks_cfg.cpp +./User/others/mks_fontHz14.c +./User/others/mks_touch_screen.c +./User/others/Multi_language/multi_language.cpp +./User/others/pic.c +./User/others/pic_manager.cpp +./User/others/sd_usr.cpp +./User/others/string_deal.c +./User/others/touch_calibrate.cpp +./User/others/wifi_module.cpp +./User/others/wifi_upload.cpp +./User/others/QRENCODE/bitstream.c +./User/others/QRENCODE/mask.c +./User/others/QRENCODE/mmask.c +./User/others/QRENCODE/mqrspec.c +./User/others/QRENCODE/QR_Encode.c +./User/others/QRENCODE/qrencode.c +./User/others/QRENCODE/qrinput.c +./User/others/QRENCODE/qrspec.c +./User/others/QRENCODE/rscode.c +./User/others/QRENCODE/split.c +./User/uart_model/mks_tft_fifo.cpp +./User/uart_model/mks_tft_function.c +./User/uart_model/mks_tft_gcode.cpp +./User/uart_model/mks_tft_protocol.c +./User/uart_model/mks_tft_reprint.cpp +./User/uart_model/mks_tft_test.cpp +./User/uart_model/MKS_USART2_IT.cpp +./User/ui/draw_about.cpp +./User/ui/draw_acceleration.cpp +./User/ui/draw_advanced.cpp +./User/ui/draw_babyStep.cpp +./User/ui/draw_baud_rate.cpp +./User/ui/draw_bind.cpp +./User/ui/draw_buttonConf.cpp +./User/ui/draw_change_speed.cpp +./User/ui/draw_current_settings.cpp +./User/ui/draw_CustomConf.cpp +./User/ui/draw_dialog.cpp +./User/ui/draw_disk.cpp +./User/ui/draw_display_conf.cpp +./User/ui/draw_extrusion.cpp +./User/ui/draw_fan.cpp +./User/ui/draw_filament_settings.cpp +./User/ui/draw_filamentchange.cpp +./User/ui/draw_FileTransfer_ui.cpp +./User/ui/draw_firmware_type.cpp +./User/ui/draw_keyboard.cpp +./User/ui/draw_language.cpp +./User/ui/draw_leveling_settings.cpp +./User/ui/draw_levelingPara_config.cpp +./User/ui/draw_log_ui.cpp +./User/ui/draw_machine.cpp +./User/ui/draw_machine_para.cpp +./User/ui/draw_machine_settings.cpp +./User/ui/draw_machine_type.cpp +./User/ui/draw_main.cpp +./User/ui/draw_manual_leveling.cpp +./User/ui/draw_MaxFeedRate.cpp +./User/ui/draw_more.cpp +./User/ui/draw_MoreBtns.cpp +./User/ui/draw_motor_settings.cpp +./User/ui/draw_move_motor.cpp +./User/ui/draw_number_key.cpp +./User/ui/draw_operate.cpp +./User/ui/draw_Pause_pos.cpp +./User/ui/draw_pause_ui.cpp +./User/ui/draw_pre_heat.cpp +./User/ui/draw_print_file.cpp +./User/ui/draw_printing.cpp +./User/ui/draw_printing_moremenu.cpp +./User/ui/draw_printMoreBtn.cpp +./User/ui/draw_ready_print.cpp +./User/ui/draw_set.cpp +./User/ui/draw_Sprayer.cpp +./User/ui/draw_steps.cpp +./User/ui/draw_temp_ui.cpp +./User/ui/draw_temperature_settings.cpp +./User/ui/draw_Tips.cpp +./User/ui/draw_TMC_sensitivity.cpp +./User/ui/draw_tool.cpp +./User/ui/draw_ui.cpp +./User/ui/draw_wifi.cpp +./User/ui/draw_wifi_list.cpp +./User/ui/draw_XYZLevelPara.cpp +./User/ui/draw_zero.cpp +./User/ui/draw_zoffset.cpp +./User/ui/id_manage.c +./Drivers/CMSIS/Device/ST/STM32F4xx/Source/Templates/system_stm32f4xx.c +./Drivers/libstmf4/source/misc.c +./Drivers/libstmf4/source/stm32f4xx_exti.c +./Drivers/libstmf4/source/stm32f4xx_fsmc.c +./Drivers/libstmf4/source/stm32f4xx_gpio.c +./Drivers/libstmf4/source/stm32f4xx_spi.c +./Drivers/libstmf4/source/stm32f4xx_usart.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_adc_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_cortex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dac_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_dma_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_flash_ramfunc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_gpio.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_hcd.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_i2c_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_iwdg.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_pwr_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rcc_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_rtc_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sd.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_spi.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_sram.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_tim_ex.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_hal_uart.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_fsmc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c +./Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usb.c +./Drivers/STM32F4xx_MKS_Driver/Src/spi_flash.c +./Middlewares/Third_Party/FatFs/src/diskio.c +./Middlewares/Third_Party/FatFs/src/ff.c +./Middlewares/Third_Party/FatFs/src/ff_gen_drv.c +./Middlewares/Third_Party/FatFs/src/option/mycc936.c +./Middlewares/Third_Party/FatFs/src/drivers/sd_diskio.c +./Middlewares/Third_Party/FatFs/src/option/syscall.c +./Middlewares/Third_Party/FatFs/src/drivers/usbh_diskio.c +./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_core.c +./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ctlreq.c +./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_ioreq.c +./Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc.c +./Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_bot.c +./Middlewares/ST/STM32_USB_Host_Library/Class/MSC/Src/usbh_msc_scsi.c +./Middlewares/ST/STM32_USB_Host_Library/Core/Src/usbh_pipes.c \ No newline at end of file